MSP430FR5989-EP Datasheet, PDF (3/154 Pages) Texas Instruments – Mixed-Signal Microcontroller

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MSP430FR5989-EP
SLASEC9 – APRIL 2017
Table of Contents
1 Device Overview ......................................... 1
1.1 Features .............................................. 1
1.2 Applications........................................... 1
1.3 Description............................................ 2
1.4 Functional Block Diagram ............................ 2
2 Revision History ......................................... 4
3 Terminal Configuration and Functions.............. 5
3.1 Pin Diagram .......................................... 5
3.2 Signal Descriptions ................................... 6
3.3 Pin Multiplexing ..................................... 12
3.4 Connection of Unused Pins ......................... 12
4 Specifications ........................................... 13
4.1 Absolute Maximum Ratings ......................... 13
4.2 ESD Ratings ........................................ 13
4.3 Recommended Operating Conditions............... 13
4.4 AEcxttievrenaMl oCduerrSeunpt_.p_.l_.y_..C_.u_..r_.re_..n_.t_.I_.n_.t_.o_..V_..C.C..E_..x_.c_.l_.u_.d_.i_.n_.g_{..... 14}
4.5 Typical Characteristics, Active Mode Supply
Currents ............................................. 15
4.6 Low-Power Mode (LPM0, LPM1) Supply Currents
Into V_CC Excluding External Current ................ 15
4.7 Low-Power Mode (LPM2, LPM3, LPM4) Supply
Currents (Into V_CC) Excluding External Current .... 16
4.8 Low-Power Mode With LCD Supply Currents (Into
V_CC) Excluding External Current .................... 18
4.9 Low-Power Mode LPMx.5 Supply Currents (Into
V_CC) Excluding External Current .................... 19
4.10 Typical Characteristics, Low-Power Mode Supply
Currents ............................................. 20
4.11 Typical Characteristics, Current Consumption per
Module .............................................. 21
4.12 Thermal Resistance Characteristics ................ 22
4.13 Timing and Switching Characteristics ............... 22
5 Detailed Description ................................... 57
5.1 Overview ............................................ 57
5.2 CPU ................................................. 57
5.3 Operating Modes .................................... 58
5.4 Interrupt Vector Table and Signatures .............. 61
5.5 Bootloader (BSL).................................... 64
5.6 JTAG Operation ..................................... 64
5.7 FRAM................................................ 65
5.8 RAM ................................................. 65
5.9 Tiny RAM............................................ 65
5.10 Memory Protection Unit Including IP Encapsulation 65
5.11 Peripherals .......................................... 66
5.12 Device Descriptors (TLV) .......................... 113
5.13 Memory ............................................ 116
5.14 Identification........................................ 134
6 Applications, Implementation, and Layout ...... 135
6.1 Device Connection and Layout Fundamentals .... 135
6.2 Peripheral- and Interface-Specific Design
Information ......................................... 139
7 Device and Documentation Support .............. 143
7.1 Device and Development Tool Nomenclature ..... 143
7.2 Tools and Software ................................ 145
7.3 Documentation Support............................ 147
7.4 Community Resources............................. 148
7.5 Trademarks ........................................ 148
7.6 Electrostatic Discharge Caution ................... 148
7.7 Export Control Notice .............................. 148
7.8 Glossary............................................ 149
8 Mechanical, Packaging, and Orderable
Information ............................................. 149
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