MSP430FR5989-EP Datasheet, PDF (127/154 Pages) Texas Instruments – Mixed-Signal Microcontroller

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MSP430FR5989-EP
SLASEC9 – APRIL 2017
Table 5-52. eUSCI_B0 Registers (Base Address: 0640h) (continued)
REGISTER DESCRIPTION
eUSCI_B address mask
eUSCI_B I2C slave address
eUSCI_B interrupt enable
eUSCI_B interrupt flags
eUSCI_B interrupt vector word
REGISTER
UCB0ADDMASK
1Eh
UCB0I2CSA
20h
UCB0IE
2Ah
UCB0IFG
2Ch
UCB0IV
2Eh
OFFSET
Table 5-53. eUSCI_B1 Registers (Base Address: 0680h)
REGISTER DESCRIPTION
eUSCI_B control word 0
eUSCI_B control word 1
eUSCI_B bit rate 0
eUSCI_B bit rate 1
eUSCI_B status word
eUSCI_B byte counter threshold
eUSCI_B receive buffer
eUSCI_B transmit buffer
eUSCI_B I2C own address 0
eUSCI_B I2C own address 1
eUSCI_B I2C own address 2
eUSCI_B I2C own address 3
eUSCI_B received address
eUSCI_B address mask
eUSCI_B I2C slave address
eUSCI_B interrupt enable
eUSCI_B interrupt flags
eUSCI_B interrupt vector word
REGISTER
UCB1CTLW0
UCB1CTLW1
UCB1BR0
UCB1BR1
UCB1STATW
UCB1TBCNT
UCB1RXBUF
UCB1TXBUF
UCB1I2COA0
UCB1I2COA1
UCB1I2COA2
UCB1I2COA3
UCB1ADDRX
UCB1ADDMASK
UCB1I2CSA
UCB1IE
UCB1IFG
UCB1IV
OFFSET
00h
02h
06h
07h
08h
0Ah
0Ch
0Eh
14h
16h
18h
1Ah
1Ch
1Eh
20h
2Ah
2Ch
2Eh
Table 5-54. ADC12_B Registers (Base Address: 0800h)
REGISTER DESCRIPTION
ADC12_B control 0
ADC12_B control 1
ADC12_B control 2
ADC12_B control 3
ADC12_B window comparator low threshold
ADC12_B window comparator high threshold
ADC12_B interrupt flag 0
ADC12_B Interrupt flag 1
ADC12_B interrupt flag 2
ADC12_B interrupt enable 0
ADC12_B interrupt enable 1
ADC12_B interrupt enable 2
ADC12_B interrupt vector
ADC12_B memory control 0
ADC12_B memory control 1
ADC12_B memory control 2
ADC12_B memory control 3
ADC12_B memory control 4
REGISTER
ADC12CTL0
ADC12CTL1
ADC12CTL2
ADC12CTL3
ADC12LO
ADC12HI
ADC12IFGR0
ADC12IFGR1
ADC12IFGR2
ADC12IER0
ADC12IER1
ADC12IER2
ADC12IV
ADC12MCTL0
ADC12MCTL1
ADC12MCTL2
ADC12MCTL3
ADC12MCTL4
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OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
18h
20h
22h
24h
26h
28h
Detailed Description 127