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TLC320V343 Datasheet, PDF (7/30 Pages) Texas Instruments – SINGLE-SUPPLY ANALOG INTERFACE CIRCUIT
TLC320V343
SINGLE-SUPPLY ANALOG INTERFACE CIRCUIT
SLAS159 – MARCH 1997
terminal functions
frame-sync function
The frame-sync signal indicates that the device is ready to send and receive data. The data transfer begins on
the falling edge of the frame-sync signal.
frame sync (FS)
The frame sync is generated internally. FS goes low on the rising edge of SCLK and remains low for the 16-bit
data transfer. In addition to generating its own frame-sync interval, the master also outputs a frame sync for each
slave that is being used.
midpoint voltages (ADC VMID and DAC VMID )
Since the device operates at a single supply voltage, two midpoint voltages are generated for internal signal
processing. ADC VMID is used for the ADC channel reference, and DAC VMID is used for the DAC channel
reference. The two references minimize channel-to-channel noise and crosstalk. ADC VMID and DAC VMID must
be buffered when used as a reference for external signal processing.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, DGTL VDD (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6.5 V
Supply voltage range, DAC VDD (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6.5 V
Supply voltage range, ADC VDD (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6.5 V
Differential supply voltage range, DGTL VDD to DAC VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6.5 V
Differential supply voltage range, all positive supply voltages to
ADC GND, DAC GND, DGTL GND, SUBS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6.5 V
Output voltage range, DOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to DGTL VDD + 0.3 V
Input voltage range, DIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to DGTL VDD + 0.3 V
Ground voltage range, ADC GND, DAC GND,
DGTL GND, SUBS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to DGTL VDD + 0.3 V
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 25°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values for DGTL VDD are with respect to DGTL GND, voltage values for DAC VDD are with respect to DAC GND, and voltage
values for ADC VDD are with respect to ADC GND. For the subsequent electrical, operating, and timing specifications, the symbol
VDD denotes all positive supplies. DAC GND, ADC GND, DGTL GND, and SUBS are at 0 V unless otherwise specified.
2. To avoid possible damage to these CMOS devices and associated operating parameters, the sequence below must be followed
when applying power:
(1) Connect SUBS, DGTL GND, ADC GND, and DAC GND to ground.
(2) Connect voltages ADC VDD and DAC VDD.
(3) Connect voltage DGTL VDD.
(4) Connect the input signals.
The sequence below must be followed when removing power.
(1) Disconnect the input signals.
(2) Disconnect voltage DGTL VDD.
(3) Disconnect voltages ADC VDD and DAC VDD.
(4) Disconnect SUBS, DGTL GND, ADC GND, and DAC GND from ground.
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