TLC320V343 Datasheet, PDF (6/30 Pages) Texas Instruments – SINGLE-SUPPLY ANALOG INTERFACE CIRCUIT

TLC320V343
SINGLE-SUPPLY ANALOG INTERFACE CIRCUIT
SLAS159 – MARCH 1997
DAC signal channel
DIN receives the 16-bit serial data word (2s-complement) from the host during the primary communications
interval and latches the data on the seventeenth rising edge of SCLK. The data are converted to an analog
voltage by the DAC with a sample-and-hold circuit and then sent through a (sin x)/x correction circuit and a
smoothing filter. An output buffer with three software-programmable gains (0 dB, – 6 dB, and – 12 dB), as shown
in register four, drives the differential outputs OUT + and OUT –. A squelch mode can also be programmed for
the output buffer. During secondary communications, the configuration program data are read into the device
control registers.
serial interface
The digital serial interface consists of the shift clock, the frame-synchronization signal, the ADC-channel data
output, and the DAC-channel data input. During the primary 16-bit frame-synchronization interval, the SCLK
transfers the ADC channel results from DOUT and transfers 16-bit DAC data into DIN.
During the secondary frame-synchronization interval, the SCLK transfers the register read data from DOUT
when the read bit is set to a 1. In addition, the SCLK transfers control and device parameter information into
DIN. The functional sequence is shown in Figure 1.
ÁÁÁÁÁÁÁÁÁÁÁÁ Sampling Period and Frame-Sync Period
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{Frame-Sync Interval}
ÁÁÁÁÁÁ ÁÁÁÁÁÁ ^{(Primary Communication)}
Frame-Sync Interval
(Secondary
Communication)
SCLK
FS
ÁÁÁÁÁÁÁÁ _{16 SCLKs}
ÁÁÁÁÁÁ _{16 SCLKs}
DOUT
ADC Conversion Result
ÁÁÁÁÁÁÁÁ ^{Register Read Data or All 0s}
DIN
DAC Input Data
ÁÁ
ÁÁ Control and Device Parameter
Data
Figure 1. Functional Sequence for Primary and Secondary Communication
required minimum number of MCLK periods
The number of MCLKs necessary for proper operation when only the primary communications are used is:
Total number of MCLKs= (16 + 2) SCLKs × 4 MCLKs per SCLK
= 72 MCLKs minimum
The number of MCLKs necessary for proper operation when the primary and secondary communications are
used is:
Total number of MCLKs= (16 + 2) SCLKs × 2 × 4 MCLKs per SCLK
= 144 MCLKs minimum
Even though the TLC320V343 can perform with this number of MCLKs, the host may need more time to execute
the required software instructions between primary and secondary communication intervals.
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