TLC320V343 Datasheet, PDF (18/30 Pages) Texas Instruments – SINGLE-SUPPLY ANALOG INTERFACE CIRCUIT

TLC320V343
SINGLE-SUPPLY ANALOG INTERFACE CIRCUIT
SLAS159 – MARCH 1997
PARAMETER MEASUREMENT INFORMATION
SCLK
2.4 V
FSD
0.8 V
SCLK period/2
td(CH-FL)
FS
0.8 V
NOTE A: Timing shown is for the TLC320V343 operating as the master or as a stand-alone device.
Figure 5. Master or Stand-Alone FS and FSD Timing
FS
0.8 V
td(FL-FDL)
FSD
0.8 V
NOTE A: Timing shown is for the TLC320V343 operating in the slave mode (FS and SCLK signals generated externally). The programmed data
value in the FSD register is 0.
Figure 6. Slave FS to FSD Timing
SCLK
2.4 V
0.8 V
td(CH-FDL)
FSD
0.8 V
NOTE A: Timing shown is for the TLC320V343 operating in the slave mode (FS and SCLK signals generated externally). There is a data value
in the FSD register greater than 18 decimal.
Figure 7. Slave SCLK to FSD Timing
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