TLC320AD55 Datasheet, PDF (7/41 Pages) Texas Instruments – Sigma-Delta Analog Interface Circuit

1 Introduction
The TLC320AD55C provides high resolution low-speed signal conversion from digital-to-analog (D/A) and
from analog-to-digital (A /D) using oversampling sigma-delta technology. This device consists of two, serial,
synchronous conversion paths (one for each data direction) and includes an interpolation filter before the
digital-to-analog converter (DAC) and a decimation filter after the analog-to-digital converter (ADC) (see
Figure 1–1). Other overhead functions provide analog filtering and on-chip timing and control. The
sigma-delta architecture produces high resolution, analog-to-digital and digital-to-analog conversion at low
system speeds and low cost.
The options and the circuit configurations of this device can be programmed through the serial interface.
The options include reset, power-down, communications protocol, serial clock rate, signal sampling rate,
and test mode as outlined in Appendix A. The circuit configurations could include a selection of input ports
to the ADC, analog loopback, digital loopback, decimator sinc filter output, decimator finite-duration
impulse-response (FIR) filter output, interpolator sinc filter output, and interpolator FIR filter output. The
TLC320AD55C is characterized for operation from 0°C to 70°C.
1.1 Features
• Single 5-V power supply
• Power dissipation (P_D) of 150 mW maximum in the operating mode
• Power-down mode to 1 mW
• General-purpose 16-bit signal processing
• 2s-complement format
• Serial port interface
• Minimum 80-dB harmonic distortion plus noise
• Differential architecture
• Internal reference voltage (V_ref)
• Internal 64 × oversampling
• Analog output with programmable gain of 1, 1/2, 1/4, and 0 (squelch)
• Phone-mode output control
• Variable conversion rate selected as MCLK/(Fk × 256), Fk = 1,2,3,...,256
• System test mode:
– Digital loopback test
– Analog loopback test
1–1