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TI380FPAA Datasheet, PDF (7/24 Pages) Texas Instruments – PACKETBLASTERE™
TI380FPAA
PACKETBLASTER ™
SPWS038 – MAY 1997
instructions for reading TI380FPAA silicon revision code
The TI380FPAA contains a register that returns a hard-wired value reflecting the revision of the TI380FPAA
silicon. The register can be read only before the CPHALT bit (in the SIFACL register) is cleared and the bring-up
diagnostics (BUD) begins executing.
The following steps should be taken to read the revision register:
1. Set the ARESET bit in the SIFACL register (bit 8) to 1.
2. Wait a minimum of 14 µs for the reset to take place.
3. Clear the ARESET bit and set the CPHALT bit in the same write to the SIFACL register.
4. One hundred microseconds after step 3, read adapter memory location 01.023E to obtain the silicon
revision level.
Steps 1 through 3 are explained in more detail in the TMS380 Second-Generation Token-Ring User’s Guide
(literature number SPWU005).
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VDD (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.6 to 7 V
Input voltage range (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 20 V
Output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 2 V to 7 V
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 W
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 5: Voltage values are with respect to VSS.
recommended operating conditions
MIN NOM MAX UNIT
VDD Supply voltage
4.75
5 5.25
V
VSS Supply voltage (see Note 6)
0
0
0
V
VIH High-level input voltage
2
VDD+0.3 V
VIL Low-level input voltage, TTL-level signal (see Note 7)
– 0.3
0.8
V
IOH High-level output current
– 400
µA
IOL Low-level output current (see Note 8)
2
mA
TA
Operating free-air temperature
0
70
°C
NOTES:
6. All VSS pins should be routed to system ground to minimize inductance.
7. The algebraic convention, where the more negative (less positive) limit is designated as a minimum, is used for logic-voltage levels
only.
8. Output current of 2 mA is sufficient to drive five low-power Schottky TTL loads or ten advanced low-power Schottky TTL loads (worst
case).
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