TI380FPAA Datasheet, PDF (22/24 Pages) Texas Instruments – PACKETBLASTERE™

TI380FPAA
PACKETBLASTER ™
SPWS038 – MAY 1997
FPA bus arbitration: FPA releases control of bus (see Figure 15)
t_M is the cycle time of one-eighth of a local-memory cycle (20.83 ns minimum for a 6-MHz local bus or
31.25 ns minimum for a 4-MHz local bus).
NO.
74 Hold time, FPA valid after MBCLK1 falling edge, bus-release
74a Hold time, MBEN valid after MBCLK1 falling edge, bus-release
75 Delay time, MBCLK1 falling edge to FPA in the high-impedance state, bus-release
75a Delay time, MBCLK1 falling edge to MBEN in the high-impedance state, bus-release
MIN
2.5tM – 13
3tM – 13
MAX
2.5tM
3tM
UNIT
ns
ns
ns
ns
MBCLK1
74
MAX0,
MAX2
MAXPH,
MAXPL,
MADH0 – MADH7
MADL0 – MADL7,
MRAS
MCAS
MW
MOE
MDDIR
MAL
MBEN
75
74a
75a
Figure 15. FPA Bus Arbitration: FPA Releases Control of Bus
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