DS90UB901Q_15 Datasheet, PDF (7/50 Pages) Texas Instruments – 10 - 43MHz 14 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel

DS90UB901Q, DS90UB902Q
www.ti.com
SNLS322E – JUNE 2010 – REVISED APRIL 2013
Absolute Maximum Ratings^(1)(2)(3)
Supply Voltage – V_DDn (1.8V)
Supply Voltage – V_DDIO
LVCMOS Input Voltage I/O Voltage
CML Driver I/O Voltage (V_DD)
CML Receiver I/O Voltage (V_DD)
Junction Temperature
Storage Temperature
Maximum Package Power Dissipation Capacity Package
Package Derating:
DS90UB901Q 32 Lead WQFN
DS90UB902Q 40 Lead WQFN
ESD Rating (IEC 61000-4-2)
θ_JA(based on 9 thermal vias)
θ_JC(based on 9 thermal vias)
θ_JA(based on 16 thermal vias)
θ_JC(based on 16 thermal vias)
Air Discharge (DOUT+, DOUT-, RIN+, RIN-)
Contact Discharge (DOUT+, DOUT-, RIN+, RIN-)
ESD Rating (ISO10605)
ESD Rating (ISO10605)
Air Discharge (DOUT+, DOUT-, RIN+, RIN-)
Contact Discharge (DOUT+, DOUT-, RIN+, RIN-)
ESD Rating (HBM)
ESD Rating (CDM)
ESD Rating (MM)
−0.3V to +2.5V
−0.3V to +4.0V
−0.3V to + (VDDIO + 0.3V)
−0.3V to +(V_DD + 0.3V)
−0.3V to (V_DD + 0.3V)
+150°C
−65°C to +150°C
1/θ_JA °C/W above +25°
34.3 °C/W
6.9 °C/W
28.0 °C/W
4.4 °C/W
R_D = 330Ω, C_S = 150pF
≥±25 kV
≥±10 kV
R_D = 330Ω, C_S = 150/330pF
R_D = 2KΩ, C_S = 150/330pF
≥±15 kV
≥±10 kV
≥±8 kV
≥±1 kV
≥±250 V
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional; the device should not be operated beyond such conditions.
(2) For soldering specifications see product folder at www.ti.com
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
Recommended Operating Conditions⁽¹⁾
Supply Voltage (V_DDn)
LVCMOS Supply Voltage (V_DDIO)
OR
LVCMOS Supply Voltage (V_DDIO)
Supply Noise
Operating Free Air Temperature (T_A)
PCLK Clock Frequency
V_DDn (1.8V)
V_DDIO (1.8V)
V_DDIO (3.3V)
Min
Nom
Max
1.71
1.8
1.89
1.71
1.8
1.89
Units
V
V
3.0
3.3
3.6
V
25
mVp-p
25
mVp-p
50
mVp-p
-40
+25
+105
°C
10
43
MHz
(1) Supply noise testing was done with minimum capacitors (as shown on Figure 39 and Figure 40) on the PCB. A sinusoidal signal is AC
coupled to the VDDn (1.8V) supply with amplitude = 25 mVp-p measured at the device VDDn pins. Bit error rate testing of input to the
Ser and output of the Des with 10 meter cable shows no error when the noise frequency on the Ser is less than 1 MHz. The Des on the
other hand shows no error when the noise frequency is less than 750 kHz.
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