DS90UB901Q_15 Datasheet, PDF (34/50 Pages) Texas Instruments – 10 - 43MHz 14 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel

DS90UB901Q, DS90UB902Q
SNLS322E – JUNE 2010 – REVISED APRIL 2013
www.ti.com
Wait 10 ms for Deserializer to acquire lock and then monitor the LOCK pin transition from LOW to HIGH. At this
point, AT SPEED BIST is operational and the BIST process has begun. The Serializer will start transfer of an
internally generated PRBS data pattern through the high speed serial link. This pattern traverses across the
interconnecting link to the Deserializer. Check the status of the PASS pin; a HIGH indicates a pass, a LOW
indicates a fail. A fail will stay LOW for ½ a clock cycle. If two or more bits in the serial frame fail, the PASS pin
will toggle ½ clock cycle HIGH and ½ clock cycle low. The user can use the PASS pin to count the number of
fails on the high speed link. In addition, there is a defined SER and DES register that will keep track of the
accumulated error count. The Serializer 901 GPIO[0] pin will be assigned as a PASS flag error indicator for the
bidirectional control channel link.
Recovered
Pixel Clock
BISTEN
Case 1: No bit errors
Recovered
Pixel Data
PASS
Previous
³&5&´ 6WDWH
³&5&´ 6WDWH
Case 2: Bit error(s)
Recovered
Pixel Data
B
PASS
Previous
³&5&´ 6WDWH
E
Case 3: Bit error(s) AFTER BIST
Duration
Recovered
Pixel Data
PASS
Previous
³&5&´ 6WDWH
B = Bad Pixel
PE = Payload
Error
BB
B
EE
E
BIST Duration
(when BISTEN=H)
Figure 35. BIST Timing Diagram
³&5&´ 6WDWH
B
³&5&´ 6WDWH
CRC Status
(when BISTEN=L)
Step 3: Stop at SPEED BIST by turning off BIST mode in the Deserializer to determine Pass/Fail.
To end BIST, the system must pull BISTEN pin of the Deserializer LOW. The BIST duration is fully defined by
the BISTEN width and Deserializer LOCK is HIGH; thus the Bit Error Rate is determined by how long the system
holds BISTEN HIGH.
BIST Duration (s)
1 Pixel period (ns) x Total Bits
= BIST Duration (s) x
f_pixel (MHz)
Pixel
x Total Pixels Transmitted = Total Bits Transmitted
Bit (Pixel) Error Rate
(for passing BIST)
=
[Total Bits Transmitted] ^-1
= [Total Bits Transmitted x Bits/Pixel] ^-1
Figure 36. BIST BER Calculation
For instance, if BISTEN is held HIGH for 1 second and the PCLK is running at 43 MHz with 16 bpp, then the Bit
Error Rate is no better than 1.46E-9.
Step 4: Place system in Normal Operating Mode by disabling BIST at the Serializer.
34
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