DS90UB901Q_15 Datasheet, PDF (5/50 Pages) Texas Instruments – 10 - 43MHz 14 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel

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DS90UB902Q Pin Diagram
DS90UB901Q, DS90UB902Q
SNLS322E – JUNE 2010 – REVISED APRIL 2013
30 29 28 27 26 25 24 23 22 21
PASS
31
RES/CMLOUTP
32
RES/CMLOUTN
33
V_DDCML
34
RIN+
35
36
RIN-
BISTEN
37
V_DDPLL
38
RES
39
MODE
40
DAP = GND
DS90B902Q
Deserializer
40-Pin WQFN
(Top View)
20
ROUT[4]
19
ROUT[5]
18
ROUT[6]
17
ROUT[7]
16
V_DDIO2
15
ROUT[8]
14
ROUT[9]
13
V_DDD
12
ROUT[10]
11
ROUT[11]
1 2 3 4 5 6 7 8 9 10
Deserializer - DS90UB902Q
40 Pin WQFN (Top View)
See Package Number RTA0040A
DS90UB902Q DESERIALIZER PIN DESCRIPTIONS
Pin Name
Pin No.
I/O, Type
Description
LVCMOS PARALLEL INTERFACE
ROUT[13:0]
9, 10, 11, 12,
14, 15, 17, 18,
19, 20, 21, 22,
23, 24
Outputs,
LVCMOS
Parallel data outputs.
HSYNC
7
Output,
Horizontal SYNC Output
LVCMOS
VSYNC
6
Output,
Vertical SYNC Output
LVCMOS
PCLK
5
Output,
LVCMOS
Pixel Clock Output Pin.
Strobe edge set by RRFB control register.
GENERAL PURPOSE INPUT OUTPUT (GPIO)
ROUT[3:0] /
GPIO[5:2]
21, 22, 23, 24
Input/Output, ROUT[3:0] general-purpose pins can be individually configured as either inputs or
LVCMOS outputs; used to control and respond to various commands.
GPIO[1:0]
26, 27
Input/Output, General-purpose pins can be individually configured as either inputs or outputs; used
LVCMOS to control and respond to various commands.
BIDIRECTIONAL CONTROL BUS - I²C COMPATIBLE
SCL
SDA
3
Input/Output, Clock line for the bidirectional control bus communication
Open Drain SCL requires an external pull-up resistor to V_DDIO.
2
Input/Output, Data line for bidirectional control bus communication
Open Drain SDA requires an external pull-up resistor to V_DDIO.
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