LM3S2637 Datasheet, PDF (617/678 Pages) Texas Instruments – Stellaris® LM3S2637 Microcontroller

Stellaris^® LM3S2637 Microcontroller
Table 18-5. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PC7
I/O
TTL
GPIO port C bit 7.
L2
C2-
I
Analog Analog comparator 2 negative input.
PA0
I/O
TTL
GPIO port A bit 0.
L3
U0Rx
I
TTL
UART module 0 receive. When in IrDA mode, this signal has IrDA
modulation.
PA3
I/O
TTL
GPIO port A bit 3.
L4
SSI0Fss
I/O
TTL
SSI module 0 frame signal
PA4
I/O
TTL
GPIO port A bit 4.
L5
SSI0Rx
I
TTL
SSI module 0 receive
PA6
I/O
TTL
GPIO port A bit 6.
L6
CCP1
I/O
TTL
Capture/Compare/PWM 1.
L7
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
PF5
I/O
TTL
GPIO port F bit 5.
L8
C1o
O
TTL
Analog comparator 1 output.
L9
PF4
I/O
TTL
GPIO port F bit 4.
L10
GND
-
Power Ground reference for logic and I/O pins.
L11
OSC0
I
Analog Main oscillator crystal input or an external clock reference input.
VBAT
L12
-
Power Power source for the Hibernation module. It is normally connected
to the positive terminal of a battery and serves as the battery
backup/Hibernation module power-source supply.
PC5
I/O
TTL
GPIO port C bit 5.
M1
C1+
I
Analog Analog comparator 1 positive input.
PC6
I/O
TTL
GPIO port C bit 6.
M2
C2+
I
Analog Analog comparator 2 positive input.
PA1
I/O
TTL
GPIO port A bit 1.
M3
U0Tx
O
TTL
UART module 0 transmit. When in IrDA mode, this signal has IrDA
modulation.
PA2
I/O
TTL
GPIO port A bit 2.
M4
SSI0Clk
I/O
TTL
SSI module 0 clock
PA5
I/O
TTL
GPIO port A bit 5.
M5
SSI0Tx
O
TTL
SSI module 0 transmit
PA7
I/O
TTL
GPIO port A bit 7.
M6
CCP4
I/O
TTL
Capture/Compare/PWM 4.
M7
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
M8
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
M9
PF0
I/O
TTL
GPIO port F bit 0.
M10
WAKE
I
TTL
An external input that brings the processor out of Hibernate mode
when asserted.
M11
OSC1
O
Analog Main oscillator crystal output. Leave unconnected when using a
single-ended clock source.
M12
HIB
O
OD
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
June 18, 2012
617
Texas Instruments-Production Data