LM3S2637 Datasheet, PDF(614/678 Page) Texas Instruments – Stellaris® LM3S2637 Microcontroller

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LM3S2637 Datasheet, PDF (614/678 Pages) Texas Instruments – Stellaris® LM3S2637 Microcontroller

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Signal Tables

Table 18-5. Signals by Pin Number (continued)

Pin Number

Pin Name

Pin Type Buffer Typea Description

GNDA

A5

-

Power The ground reference for the analog circuits (ADC, Analog

Comparators, etc.). These are separated from GND to minimize

the electrical noise contained on VDD from affecting the analog

functions.

PB4

I/O

TTL

GPIO port B bit 4.

A6

C0-

I

Analog Analog comparator 0 negative input.

PB6

I/O

TTL

GPIO port B bit 6.

A7

C0+

I

Analog Analog comparator 0 positive input.

PB7

I/O

TTL

GPIO port B bit 7.

A8

TRST

I

TTL

JTAG TRST.

PC0

I/O

TTL

GPIO port C bit 0.

A9

SWCLK

I

TTL

JTAG/SWD CLK.

TCK

I

TTL

JTAG/SWD CLK.

PC3

I/O

TTL

GPIO port C bit 3.

A10

SWO

O

TTL

JTAG TDO and SWO.

TDO

O

TTL

JTAG TDO and SWO.

A11

PE0

I/O

TTL

GPIO port E bit 0.

A12

PE3

I/O

TTL

GPIO port E bit 3.

B1

ADC0

I

Analog Analog-to-digital converter input 0.

B2

ADC3

I

Analog Analog-to-digital converter input 3.

B3

ADC2

I

Analog Analog-to-digital converter input 2.

B4

NC

-

-

No connect. Leave the pin electrically unconnected/isolated.

GNDA

B5

-

Power The ground reference for the analog circuits (ADC, Analog

Comparators, etc.). These are separated from GND to minimize

the electrical noise contained on VDD from affecting the analog

functions.

B6

GND

-

Power Ground reference for logic and I/O pins.

PB5

I/O

TTL

GPIO port B bit 5.

B7

C1-

I

Analog Analog comparator 1 negative input.

PC2

I/O

TTL

GPIO port C bit 2.

B8

TDI

I

TTL

JTAG TDI.

PC1

I/O

TTL

GPIO port C bit 1.

B9

SWDIO

I/O

TTL

JTAG TMS and SWDIO.

TMS

I/O

TTL

JTAG TMS and SWDIO.

B10

CMOD1

I

TTL

CPU Mode bit 1. Input must be set to logic 0 (grounded); other

encodings reserved.

B11

PE2

I/O

TTL

GPIO port E bit 2.

B12

PE1

I/O

TTL

GPIO port E bit 1.

C1

NC

-

-

No connect. Leave the pin electrically unconnected/isolated.

C2

NC

-

-

No connect. Leave the pin electrically unconnected/isolated.

C3

VDD25

-

Power Positive supply for most of the logic function, including the

processor core and most peripherals.

C4

GND

-

Power Ground reference for logic and I/O pins.

C5

GND

-

Power Ground reference for logic and I/O pins.

614

June 18, 2012

Texas Instruments-Production Data

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