LM3S2637 Datasheet, PDF (3/678 Pages) Texas Instruments – Stellaris® LM3S2637 Microcontroller

Stellaris^® LM3S2637 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 24
About This Document .................................................................................................................... 30
Audience .............................................................................................................................................. 30
About This Manual ................................................................................................................................ 30
Related Documents ............................................................................................................................... 30
Documentation Conventions .................................................................................................................. 31
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
Architectural Overview .......................................................................................... 33
Product Features .......................................................................................................... 33
Target Applications ........................................................................................................ 40
High-Level Block Diagram ............................................................................................. 41
Functional Overview ...................................................................................................... 43
ARM Cortex™-M3 ......................................................................................................... 43
Motor Control Peripherals .............................................................................................. 44
Analog Peripherals ........................................................................................................ 44
Serial Communications Peripherals ................................................................................ 45
System Peripherals ....................................................................................................... 46
Memory Peripherals ...................................................................................................... 47
Additional Features ....................................................................................................... 48
Hardware Details .......................................................................................................... 48
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 49
Block Diagram .............................................................................................................. 50
Overview ...................................................................................................................... 51
System-Level Interface .................................................................................................. 51
Integrated Configurable Debug ...................................................................................... 51
Trace Port Interface Unit (TPIU) ..................................................................................... 52
Cortex-M3 System Component Details ........................................................................... 52
Programming Model ...................................................................................................... 53
Processor Mode and Privilege Levels for Software Execution ........................................... 53
Stacks .......................................................................................................................... 53
Register Map ................................................................................................................ 54
Register Descriptions .................................................................................................... 55
Exceptions and Interrupts .............................................................................................. 68
Data Types ................................................................................................................... 68
Memory Model .............................................................................................................. 68
Memory Regions, Types and Attributes ........................................................................... 70
Memory System Ordering of Memory Accesses .............................................................. 70
Behavior of Memory Accesses ....................................................................................... 70
Software Ordering of Memory Accesses ......................................................................... 71
Bit-Banding ................................................................................................................... 72
Data Storage ................................................................................................................ 74
Synchronization Primitives ............................................................................................. 75
Exception Model ........................................................................................................... 76
Exception States ........................................................................................................... 77
Exception Types ............................................................................................................ 77
Exception Handlers ....................................................................................................... 80
June 18, 2012
3
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