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BQ33100_15 Datasheet, PDF (6/67 Pages) Texas Instruments – Super Capacitor Manager
bq33100
SLUS987B – JANUARY 2011 – REVISED DECEMBER 2015
www.ti.com
7.6 Supply Current
Typical values stated where TA = 25°C and VCC = VCC = 14.4 V, Minimum and maximum values stated where TA = –40°C to
85°C and VCC = VCC = 3.8 V to 25 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
ICC
ISHUTDOWN
Normal mode
Shutdown mode
Firmware running, no flash writes
TA = –40°C to 110°C
660
μA
0.5
1 μA
7.7 REG27 LDO
Typical values stated where TA = 25°C and VCC = VCC = 14.4 V, Minimum and maximum values stated where TA = –40°C to
85°C and VCC = VCC = 3.8 V to 25 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
VREG–
VREG27IT–
VREG27IT+
ΔV(REGTEMP)
Regulator output voltage
IREG27 = 10 mA
Negative-going POR voltage At REG27
Positive-going POR voltage At REG27
Regulator output change with
temperature
IREG = 10 mA
TA = –40°C to 85°C
TA = –40°C to 85°C
2.5
2.7
2.22 2.35
2.25
2.5
±0.5%
2.75 V
2.34 V
2.6 V
ΔV(REGLINE)
ΔV(REGLOAD)
I(REGMAX)
Line regulation
Load regulation
Current limit
IREG = 10 mA
IREG = 0.2 to 10 mA
±2
±4 mV
±20
±40 mV
25
50 mA
7.8 Coulomb Counter
Typical values stated where TA = 25°C and VCC = VCC = 14.4 V, Minimum and maximum values stated where TA = –40°C to
85°C and VCC = VCC = 3.8 V to 25 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input voltage range
–0.2
0.25
V
Conversion time
Single conversion
250
ms
Effective resolution
Single conversion
15
Bits
Integral nonlinearity
Offset error(1)
Offset error drift
Full-scale error(2)
TA = –25°C to 85°C
TA = –25°C to 85°C
–0.8%
±0.007
10
0.3
0.2%
±0.034
0.5
0.8%
%FSR
μV
μV/°C
Full-scale error drift
150 PPM/°C
Effective input resistance
2.5
MΩ
(1) Post Calibration Performance
(2) Uncalibrated performance. This gain error can be eliminated with external calibration.
7.9 ADC
Typical values stated where TA = 25°C and VCC = VCC = 14.4 V, Minimum and maximum values stated where TA = –40°C to
85°C and VCC = VCC = 3.8 V to 25 V (unless otherwise noted)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
Input voltage range
Conversion time
TS, VC5
–0.2
31.5
0.8 × VREG27
V
ms
Resolution (no missing codes)
16
Bits
Effective resolution
14
15
Bits
Integral nonlinearity
Offset error(1)
±0.02
%FSR
70
160
μV
Offset error drift
1
μV/°C
Full-scale error
Full-scale error drift
VIN = 1 V
–0.8%
±0.2%
0.4%
150
PPM/°C
Effective input resistance
8
MΩ
(1) Channel to channel offset
6
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