BQ33100_15 Datasheet, PDF (16/67 Pages) Texas Instruments – Super Capacitor Manager

bq33100
SLUS987B – JANUARY 2011 – REVISED DECEMBER 2015
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Feature Description (continued)
8.3.1.3 Initial Capacitance at Device Reset
The bq33100 estimates the initial capacitance of a at device reset, which is the case when the capacitors are first
attached to the application circuit. This gives a reasonably accurate Capacitance and RSOC value, however,
Super Capacitor capacitance learning is required in order to improve the accuracy of Capacitance and RSOC.
8.3.1.4 Qualified Capacitance Learning
The bq33100 updates Capacitance with an amount based on the value learned during a qualified learning cycle.
Once updated, the bq33100 writes the new Capacitance value to data flash to Capacitance.
The bq33100 sets [CL] = 1 and clears [LPASS] in Operation Status when a qualified capacitance learning cycle
begins. The period of time that the learning takes is set by CL Time although the first learning cycle after a
device reset will not occur until after an elapsed time of Learning Frequency. When a qualified learn has
occurred [LPASS] in Operation Status is set.
During the learning process there are specific timeouts to protect from over charge or over discharge of the
super capacitor array. At the beginning of each phase of charge and discharge a timer is started. If the timer
exceeds Max Discharge Time during the discharging phase then Operation Status [LDTO] is set if the timer
exceeds Max Charge Time for the charging phase then Operation Status [LCTO] is set. the flags are cleared
upon the beginning of the next learning cycle.
8.3.1.5 Health Determination
The bq33100 uses Equation 4 to determine the relative health of the capacitor.
Health = (Capacitance / InitialCapacitance)
(4)
The bq33100 will determine a new ChargingVoltage at end of the learning cycle based on the newly learned
Capacitance. The following warnings will be set based on the changes in ChargingVoltage and the capacitors
ability to provide the minimum power needs.
ChargingVoltage = V Chg Nominal then SafetyStatus[HLOW], [HWARN] and [HFAIL] are cleared.
If ChargingVoltage is set to V Chg A or V Chg B then SafetyStatus[HLOW] is set.
If ChargingVoltage is set to V Chg Max then SafetyStatus [HWARN] is set.
If ChargingVoltage is set to V Chg Max and the bq33100 determines that the newly learned Capacitance cannot
provide the minimum power requirements then SafetyStatus [HFAIL] is set.
The minimum power requirements is determined by the Min Power, Required Time and Min Voltage data flash
values.
If the corresponding [HLOW], [HWARN] or [HFAIL] bits are set in FAULT when the SafetyStatus[HLOW] or
[HWARN] bit is set then the FAULT pin is set.
8.3.1.6 ESR Measurement
The bq33100 measures the voltage on the capacitor stack when the LLEN pin (pin 17) is high with the initial
learned value stored in Initial ESR which is only updated once. The LLEN pin is controlled by firmware to enable
a circuit that presents a constant current load to the full capacitor stack. With the known voltage and known
current the ESR of the capacitor array can be determined. The final reported value of ESR is also adjusted by
the data flash value of ESR Offset. The original value of the capacitor array ESR is stored in Design ESR but is
not used by the bq33100.
The final value of ESR can be read from the bq33100 through ESR which is in mΩ.
8.3.1.7 Monitor Operating Modes
Entry and exit of each mode is controlled by data flash parameters. In Discharge Mode, the [DSG] flag in
Operation Status is set. Discharge mode is entered when Current goes below (-)Dsg Current Threshold.
Discharge mode is exited when Current goes above Chg Current Threshold threshold for more than 1 second.
Charge mode is entered when Current goes above Chg Current Threshold. Charge mode is exited when
Current goes below Dsg Current Threshold for more than 1 second.
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