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BQ33100_15 Datasheet, PDF (44/67 Pages) Texas Instruments – Super Capacitor Manager
bq33100
SLUS987B – JANUARY 2011 – REVISED DECEMBER 2015
www.ti.com
0000 is the bq33100 power on reset default.
OCDV3, OCDV2, OCDV1, OCDV0 — Sets the overcurrent voltage threshold (VSRP-VSRN)) in discharging of
the integrated AFE.
0x0 - 0xf = sets the short circuit in discharging delay between 0ms - 915ms in 61ms steps.
[RSNS] = 0, 0x0 - 0xf sets the voltage threshold between 50 mV and 200 mV in 10 mV steps.
[RSNS] = 1, 0x0 - 0xf sets the voltage threshold between 20 mV and 100 mV in 5 mV steps.
OCDV (b7...b4) — Not used.
Table 64. OCDV (b2-b0) Configuration Bits with Corresponding Voltage Threshold When
STATE_CTL[RSNS] = 0
SETTING
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
THRESHOLD
0.050 V
0.060 V
0.070 V
0.080 V
0.090 V
0.100 V
0.110 V
0.120 V
SETTING
0x08
0x09
0x0a
0x0b
0x0c
0x0d
0x0e
0x0f
THRESHOLD
0.130 V
0.140 V
0.150 V
0.160 V
0.170 V
0.180 V
0.190 V
0.200 V
Table 65. OCDV (b2-b0) Configuration Bits with Corresponding Voltage Threshold When
STATE_CTL[RSNS] = 1
SETTING
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
THRESHOLD
0.025 V
0.050 V
0.035 V
0.040 V
0.045 V
0.050 V
0.055 V
0.060 V
SETTING
0x08
0x09
0x0a
0x0b
0x0c
0x0d
0x0e
0x0f
THRESHOLD
0.065 V
0.070V
0.075 V
0.080 V
0.085 V
0.090 V
0.095V
0.100 V
8.5.3.4.2 OC Dsg Time
The OC Dsg Time is programmed into the OCDD register of the integtrated AFE device. The OC Dsg Time sets
the overcurrent in discharging delay. Changes to this data flash value requires a firmware full reset or a power
reset of the bq33100 to take effect.
Table 66. OC Dsg Time
SUBCLASS
ID
1
SUBCLASS
NAME
Current
OFFSET NAME
17 OC Dsg Time
FORMAT
Hex
SIZE IN
BYTES
1
MIN
VALUE
0x00
MAX
VALUE
0x0F
DEFAULT
VALUE
0x0F
UNIT
—
Figure 11. OCDD Register
7
6
5
4
3
2
1
0
—
—
—
—
OCDD3
OCDD2
OCDD1
OCDD0
44
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