BQ33100_15 Datasheet, PDF (15/67 Pages) Texas Instruments – Super Capacitor Manager

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Feature Description (continued)
V
Idle
Learning
ESR
Delta V
Charging
Capacita
nce
Delta V
Charging
I
500mA
bq33100
SLUS987B – JANUARY 2011 – REVISED DECEMBER 2015
Full Charge
A
Constant Current Discharge
B
C
Vbat
Linear
Regression
D
Capacita
nce
Delta T
Linear
Regressi
on Base
t
Current
t
-500mA
Figure 5. Voltage as Current During Learning
where:
C = I × (t[D]–t[C])/(V[C]–V[D])
(1)
and
ESR = (V[A]–V[B])/I
(2)
8.3.1.2 Main Monitoring Registers
Capacitance represents the total capacitance in the capacitor array and presents the value in units of F (Farads)
to 1 decimal place.
On initialization, the bq33100 sets Capacitance to the data flash value stored in Initial Capacitance. During
subsequent learning cycles, the bq33100 updates Capacitance with the last measured capacitance of the . Once
updated, the bq33100 writes the new Capacitance value to data flash to Capacitance. Capacitance represents
the full Super Capacitor reference for relative state of charge calculations.
InitialCapacitance — The first updated value of Super Capacitor capacitance and represented in units of F.
RelativeStateOfCharge (RSOC) represents the % of available energy. Use Equation 3 to calculate the RSOC.
(Voltage – Min voltage) / (Charging Voltage – Min voltage)
(3)
Learning Frequency — The Learning Frequency register sets the time between automatic learning cycles of the
Super Capacitor which can also be manually executed by issuing a ManufacturerAccess Learn command. The
bq33100 uses the learning cycles to measure the Super Capacitor capacitance and update the Capacitance
register accordingly. When the bq33100 is in Unsealed Mode then a value of 250 is used to set the Learning
Frequency to 10 minutes for test purposes.
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