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DRV2605L Datasheet, PDF (51/69 Pages) Texas Instruments – DRV2605L 2 to 5.2 V Haptic Driver for LRA and ERM With Effect Library and Smart-Loop Architecture
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DRV2605L
SLOS854C – MAY 2014 – REVISED SEPTEMBER 2014
8.6.27 V(BAT) Voltage Monitor (Address: 0x21)
Figure 56. V(BAT) Voltage-Monitor Register
7
BIT FIELD
7-0 VBAT[7:0]
6
5
4
3
2
1
0
VBAT[7:0]
R/W-0
Table 30. V(BAT) Voltage-Monitor Register Field Descriptions
TYPE DEFAULT
R/W 0
DESCRIPTION
This bit provides a real-time reading of the supply voltage at the VDD pin. The
device must be actively sending a waveform to take a reading.
VDD (V) = VBAT[7:0] × 5.6V / 255
8.6.28 LRA Resonance Period (Address: 0x22)
Figure 57. LRA Resonance-Period Register
7
6
5
4
3
2
1
0
LRA_PERIOD[7:0]
R/W-0
BIT FIELD
7-0 LRA_PERIOD[7:0]
Table 31. LRA Resonance-Period Register Field Descriptions
TYPE
R/W
DEFAULT
0
DESCRIPTION
This bit reports the measurement of the LRA resonance period. The device must
be actively sending a waveform to take a reading.
LRA period (us) = LRA_Period[7:0] × 98.46 µs
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