DRV2605L Datasheet, PDF (22/69 Pages) Texas Instruments – DRV2605L 2 to 5.2 V Haptic Driver for LRA and ERM With Effect Library and Smart-Loop Architecture

DRV2605L
SLOS854C – MAY 2014 – REVISED SEPTEMBER 2014
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8.5 Programming
8.5.1 Auto-Resonance Engine Programming for the LRA
8.5.1.1 Drive-Time Programming
The resonance frequency of each LRA actuator varies based on many factors and is generally dominated by
mechanical properties. The auto-resonance engine-tracking system is optimized by providing information about
the resonance frequency of the actuator. The DRIVE_TIME[4:0] bit is used as an initial guess for the half-period
of the LRA.. The drive time is automatically and quickly adjusted for optimum drive. For example, if the LRA has
a resonance frequency of 200 Hz, then the drive time should be set to 2.5 ms.
For ERM actuators, the DRIVE_TIME[4:0] bit controls the rate for back-EMF sampling. Lower drive times imply
higher back-EMF sampling frequencies which cause higher peak-to-average ratios in the output signal, and
requires more supply headroom. Higher drive times imply lower back-EMF sampling frequencies which cause the
feedback to react at a slower rate.
8.5.1.2 Current-Dissipation Time Programming
to sense the back-EMF of the actuator, the DRV2605L device goes into high impedance mode. However, before
the device enters this mode, it must dissipate the current in the actuator. The DRV2605L device controls the time
allocated for dissipation-current through the IDISS_TIME[3:0] bit.
8.5.1.3 Blanking Time Programming
After the current in the actuator dissipates, the DRV2605L device waits for a blanking time of the signal to settle
before the back-EMF analog-to-digital (AD) conversion converts. The BLANKING_TIME[3:0] bit controls this time.
8.5.1.4 Zero-Crossing Detect-Time Programming
When the blanking time expires, the back-EMF AD monitors for zero crossings. The ZC_DET_TIME[1:0] bit
controls the minimum time allowed for detecting zero crossings.
8.5.2 Automatic-Level Calibration Programming
8.5.2.1 Rated Voltage Programming
The rated voltage is the driving voltage that the driver will output during steady state. However, in closed-loop
drive mode, temporarily having an output voltage that is higher than the rated voltage is possible. See the
Overdrive Voltage-Clamp Programming section for details.
The RATED_VOLTAGE[7:0] bit in register 0x16 sets the rated voltage for the closed-loop drive modes. For the
ERM, Equation 4 calculates the average steady-state voltage when a full-scale input signal is provided. For the
LRA, Equation 5 calculates the root-mean-square (RMS) voltage when driven to steady state with a full-scale
input signal.
V_{(ERM-CL_AV)}= 21.18 × 10^± RATED_VOLTAGE[7:0]
(4)
V_{(LRA-CL_RMS)} =
20.58 × 10^± × RATED_VOLTAGE[7:0]
± î W_{(SAMPLE_TIME)}   K ^±6  î ¦_(LRA)
(5)
In open-loop mode, the RATED_VOLTAGE[7:0] bit is ignored. Instead, the OD_CLAMP[7:0] bit (in register 0x17)
is used to set the rated voltage for the open-loop drive modes. For the ERM, Equation 6 calculates the rated
voltage with a full-scale input signal. For the LRA, Equation 7 calculates the RMS voltage with a full-scale input
signal.
V_{(ERM-OL_AV)} = 21.59 × 10^± OD_CLAMP[7:0]
(6)
9_{(LRA-OL_RMS)}  î ^± î 2'B&/$03>@ î ± ¦_(LRA) î  î ^±
(7)
The auto-calibration routine uses the RATED_VOLTAGE[7:0] and OD_CLAMP[7:0] bits as inputs and therefore
these registers must be written before calibration is performed. Any modification of this register value should be
followed by calibration to appropriately set A_CAL_BEMF[7:0].
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