DRV2605L Datasheet, PDF (2/69 Pages) Texas Instruments – DRV2605L 2 to 5.2 V Haptic Driver for LRA and ERM With Effect Library and Smart-Loop Architecture

DRV2605L
SLOS854C – MAY 2014 – REVISED SEPTEMBER 2014
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Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 Handling Ratings....................................................... 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Timing Requirements ................................................ 6
6.7 Switching Characteristics .......................................... 6
6.8 Typical Characteristics .............................................. 7
7 Parameter Measurement Information .................. 9
7.1 Test Setup for Graphs............................................... 9
8 Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 19
8.5 Programming........................................................... 22
8.6 Register Map........................................................... 33
9 Application and Implementation ........................ 52
9.1 Application Information............................................ 52
9.2 Typical Application .................................................. 53
9.3 Initialization Setup ................................................... 56
10 Power Supply Recommendations ..................... 57
11 Layout................................................................... 58
11.1 Layout Guidelines ................................................. 58
11.2 Layout Example .................................................... 59
12 Device and Documentation Support ................. 60
12.1 Device Support...................................................... 60
12.2 Trademarks ........................................................... 61
12.3 Electrostatic Discharge Caution ............................ 61
12.4 Glossary ................................................................ 61
13 Mechanical, Packaging, and Orderable
Information ........................................................... 61
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (June 2014) to Revision C
Page
• Added VSSOP package option .............................................................................................................................................. 3
• Added IN/TRIG pin connection to GND required if not used.................................................................................................. 3
• Changed minimum supported resonant frequency from 50 Hz to 125 Hz ............................................................................ 5
• Added Digital pull-down resistance parameter to Electrical Characteristics .......................................................................... 6
• Changed connection terminal of input impedance from GND to V_{(CM_ANA)} in Electrical Characteristics section .................... 6
• Added exceptional behavior for I²C Watchdog Timer .......................................................................................................... 18
• Changed calibration diagram to include DRIVE_TIME into ERM requirements .................................................................. 26
• Changed bitfield name from "LRA_DRIVE_MODE" to "OTP_STATUS".............................................................................. 49
• Changed C_(REG) from 0.1 to 1 µF ......................................................................................................................................... 53
Changes from Revision A (May 2014) to Revision B
Page
• Changed the view listed for the DSBGA package drawing from bottom to top...................................................................... 3
Changes from Original (May 2014) to Revision A
Page
• Changed device status from Product Preview to Production Data ....................................................................................... 1
2
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