DRV2605L Datasheet, PDF (46/69 Pages) Texas Instruments – DRV2605L 2 to 5.2 V Haptic Driver for LRA and ERM With Effect Library and Smart-Loop Architecture

DRV2605L
SLOS854C – MAY 2014 – REVISED SEPTEMBER 2014
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BIT FIELD
3-2 BLANKING_TIME[1:0]
Table 25. Control2 Register Field Descriptions (continued)
TYPE
R/W
DEFAULT
2
DESCRIPTION
Blanking time before the back-EMF AD makes a conversion. (Advanced use only)
Blanking time for LRA has an additional 2 bits (BLANKING_TIME[3:2]) located in
register 0x1F. Depending on the status of N_ERM_LRA the blanking time
represents different values.
N_ERM_LRA = 0 (ERM mode)
0: 45 µs
1: 75 µs
2: 150 µs
3: 225 µs
N_ERM_LRA = 1(LRA mode)
0: 15 µs
1: 25 µs
2: 50 µs
3: 75 µs
4: 90 µs
5: 105 µs
6: 120 µs
7: 135 µs
8: 150 µs
9: 165 µs
10: 180 µs
11: 195 µs
12: 210 µs
13: 235 µs
14: 260 µs
15: 285 µs
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