MSP430FR573 Datasheet, PDF (50/109 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430FR573x
MSP430FR572x
SLAS639D – JULY 2011 – REVISED AUGUST 2012
www.ti.com
Outputs – General Purpose I/O
(P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.1, PJ.0 to PJ.5)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
V_OH High-level output voltage
V_OL Low-level output voltage
TEST CONDITIONS
I_(OHmax) = –1 mA ⁽¹⁾
I_(OHmax) = –3 mA ⁽²⁾
I_(OHmax) = –2 mA ⁽¹⁾
I_(OHmax) = –6 mA ⁽²⁾
I_(OLmax) = 1 mA ⁽¹⁾
I_(OLmax) = 3 mA ⁽²⁾
I_(OLmax) = 2 mA ⁽¹⁾
I_(OLmax) = 6 mA ⁽²⁾
V_CC
MIN
2V
V_CC – 0.25
V_CC – 0.60
3V
V_CC – 0.25
V_CC – 0.60
2V
V_SS
V_SS
3V
V_SS
V_SS
MAX
V_CC
V_CC
V_CC
V_CC
V_SS + 0.25
V_SS + 0.60
V_SS + 0.25
V_SS + 0.60
UNIT
V
V
(1) The maximum total current, I_(OHmax) and I_(OLmax), for all outputs combined, should not exceed ±48 mA to hold the maximum voltage drop
specified.
(2) The maximum total current, I_(OHmax) and I_(OLmax), for all outputs combined, should not exceed ±100 mA to hold the maximum voltage
drop specified.
Output Frequency – General Purpose I/O
(P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.1, PJ.0 to PJ.5)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
f_Px.y
Port output frequency
(with load)
Px.y ^{(1) (2)}
V_CC
MIN
2V
3V
f_{Port_CLK}
Clock output frequency
ACLK, SMCLK, or MCLK at configured output port,
C_L = 20 pF, no DC loading ⁽²⁾
2V
3V
MAX
16
24
16
24
UNIT
MHz
MHz
(1) A resistive divider with 2 × 1.6 kΩ between V_CC and V_SS is used as load. The output is connected to the center tap of the divider.
C_L = 20 pF is connected from the output to V_SS.
(2) The output voltage reaches at least 10% and 90% V_CC at the specified toggle frequency.
50
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