MSP430FR573 Datasheet, PDF (28/109 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430FR573x
MSP430FR572x
SLAS639D – JULY 2011 – REVISED AUGUST 2012
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DMA Controller
The DMA controller allows movement of data from one memory address to another without CPU intervention. For
example, the DMA controller can be used to move data from the ADC10_B conversion memory to RAM. Using
the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system
power consumption by allowing the CPU to remain in sleep mode, without having to awaken to move data to or
from a peripheral.
Table 11. DMA Trigger Assignments ⁽¹⁾
TRIGGER
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
CHANNEL 0
DMAREQ
TA0CCR0 CCIFG
TA0CCR2 CCIFG
TA1CCR0 CCIFG
TA1CCR2 CCIFG
Reserved
Reserved
TB0CCR0 CCIFG
TB0CCR2 CCIFG
TB1CCR0 CCIFG ⁽²⁾
TB1CCR2 CCIFG ⁽²⁾
TB2CCR0 CCIFG ⁽³⁾
TB2CCR2 CCIFG ⁽³⁾
Reserved
UCA0RXIFG
UCA0TXIFG
UCA1RXIFG ⁽⁴⁾
UCA1TXIFG ⁽⁴⁾
UCB0RXIFG0
UCB0TXIFG0
UCB0RXIFG1
UCB0TXIFG1
UCB0RXIFG2
UCB0TXIFG2
UCB0RXIFG3
UCB0TXIFG3
ADC10IFGx ⁽⁵⁾
Reserved
Reserved
MPY ready
DMA2IFG
DMAE0 ⁽⁶⁾
CHANNEL 1
DMAREQ
TA0CCR0 CCIFG
TA0CCR2 CCIFG
TA1CCR0 CCIFG
TA1CCR2 CCIFG
Reserved
Reserved
TB0CCR0 CCIFG
TB0CCR2 CCIFG
TB1CCR0 CCIFG ⁽²⁾
TB1CCR2 CCIFG ⁽²⁾
TB2CCR0 CCIFG ⁽³⁾
TB2CCR2 CCIFG ⁽³⁾
Reserved
UCA0RXIFG
UCA0TXIFG
UCA1RXIFG ⁽⁴⁾
UCA1TXIFG ⁽⁴⁾
UCB0RXIFG0
UCB0TXIFG0
UCB0RXIFG1
UCB0TXIFG1
UCB0RXIFG2
UCB0TXIFG2
UCB0RXIFG3
UCB0TXIFG3
ADC10IFGx ⁽⁵⁾
Reserved
Reserved
MPY ready
DMA0IFG
DMAE0 ⁽⁶⁾
(1) If a reserved trigger source is selected, no trigger is generated.
(2) Only on devices with TB1, otherwise reserved
(3) Only on devices with TB2, otherwise reserved
(4) Only on devices with eUSCI_A1, otherwise reserved
(5) Only on devices with ADC, otherwise reserved
(6) This function is not available on YFF package types.
CHANNEL 2
DMAREQ
TA0CCR0 CCIFG
TA0CCR2 CCIFG
TA1CCR0 CCIFG
TA1CCR2 CCIFG
Reserved
Reserved
TB0CCR0 CCIFG
TB0CCR2 CCIFG
TB1CCR0 CCIFG ⁽²⁾
TB1CCR2 CCIFG ⁽²⁾
TB2CCR0 CCIFG ⁽³⁾
TB2CCR2 CCIFG ⁽³⁾
Reserved
UCA0RXIFG
UCA0TXIFG
UCA1RXIFG ⁽⁴⁾
UCA1TXIFG ⁽⁴⁾
UCB0RXIFG0
UCB0TXIFG0
UCB0RXIFG1
UCB0TXIFG1
UCB0RXIFG2
UCB0TXIFG2
UCB0RXIFG3
UCB0TXIFG3
ADC10IFGx ⁽⁵⁾
Reserved
Reserved
MPY ready
DMA1IFG
DMAE0 ⁽⁶⁾
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