MSP430FR573 Datasheet, PDF (29/109 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430FR573x
MSP430FR572x
www.ti.com
SLAS639D – JULY 2011 – REVISED AUGUST 2012
Enhanced Universal Serial Communication Interface (eUSCI)
The eUSCI modules are used for serial data communication. The eUSCI module supports synchronous
communication protocols such as SPI (3 or 4 pin) and I²C, and asynchronous communication protocols such as
UART, enhanced UART with automatic baudrate detection, and IrDA. Each eUSCI module contains two portions,
A and B.
The eUSCI_An module provides support for SPI (3 pin or 4 pin), UART, enhanced UART, or IrDA.
The eUSCI_Bn module provides support for SPI (3 pin or 4 pin) or I2C.
The MSP430FR572x and MSP430FR573x series include one or two eUSCI_An modules (eUSCI_A0,
eUSCI_A1) and one eUSCI_Bn module (eUSCI_B).
TA0, TA1
TA0 and TA1 are 16-bit timers/counters (Timer_A type) with three capture/compare registers each. Each can
support multiple capture/compares, PWM outputs, and interval timing. Each has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
RHA
3-P1.2
INPUT PIN NUMBER
RGE, YFF
DA
3-P1.2,
A3‑P1.2
7-P1.2
PW
7-P1.2
3-P1.2
28-P1.6
34-P2.3
3-P1.2,
A3‑P1.2
16-P1.6,
E2‑P1.6
N/A
7-P1.2
30-P1.6
36-P2.3
7-P1.2
22-P1.6
27-P2.3
1-P1.0
1-P1.0,
N/A
5-P1.0
5-P1.0
2-P1.1
2-P1.1,
A2‑P1.1
6-P1.1
6-P1.1
(1) Only on devices with ADC
Table 12. TA0 Signal Connections
DEVICE
INPUT
SIGNAL
MODULE
INPUT
SIGNAL
MODULE
BLOCK
MODULE
OUTPUT
SIGNAL
DEVICE
OUTPUT
SIGNAL
RHA
OUTPUT PIN NUMBER
RGE, YFF
DA
PW
TA0CLK
TACLK
ACLK
(internal)
ACLK
Timer
N/A
N/A
SMCLK
(internal)
SMCLK
TA0CLK
TACLK
TA0.0
CCI0A
28-P1.6
16-P1.6 ,
E2‑P1.6
30-P1.6
22-P1.6
TA0.0
CCI0B
CCR0
TA0
TA0.0
34-P2.3
N/A
36-P2.3
27-P2.3
DV_SS
GND
DV_CC
V_CC
TA0.1
CCI1A
1-P1.0
1-P1.0 , N/A
5-P1.0
5-P1.0
ADC10
ADC10
ADC10
ADC10
CDOUT
(internal)
CCI1B
CCR1
TA1
TA0.1
(internal) ⁽¹⁾ (internal) ⁽¹⁾ (internal) ⁽¹⁾ (internal) ⁽¹⁾
ADC10SHSx ADC10SHSx ADC10SHSx ADC10SHSx
= {1}
= {1}
= {1}
= {1}
DV_SS
DV_CC
TA0.2
GND
V_CC
CCI2A
2-P1.1
2-P1.1,
A2‑P1.1
6-P1.1
6-P1.1
ACLK
(internal)
CCI2B
CCR2
TA2
TA0.2
DV_SS
DV_CC
GND
V_CC
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