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| ADS1218_14 Datasheet, PDF (5/45 Pages) Texas Instruments – 8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER with FLASH Memory | |||
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ADS1218
www.ti.com
SBAS187C â SEPTEMBER 2001 â REVISED SEPTEMBER 2005
ELECTRICAL CHARACTERISTICS: AVDD = 3V
All specifications TMIN to TMAX, AVDD = +3V, DVDD = +2.7V to 5.25V, fMOD = 19.2kHz, fOSC = 2.4576MHz, PGA = 1, Buffer On,
RDAC = 75kâ¦, VREF â¡ (REF IN+) â (REF INâ) = +1.25V, and fDATA = 10Hz, unless otherwise specified.
ADS1218
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUT (AIN0 â AIN7, AINCOM)
Analog Input Range
Full-Scale Input Voltage Range
Input Impedance
Buffer Off
Buffer On
(In+) â (Inâ), See Block Diagram
Buffer Off
AGND â 0.1
AGND + 0.05
5/PGA
AVDD + 0.1
V
AVDD â 1.5
V
±VREF/PGA
V
Mâ¦
Input Current
Buffer On
0.5
nA
Bandwidth
Fast Settling Filter
Sinc2 Filter
â3dB
â3dB
0.469 Ã fDATA
Hz
0.318 Ã fDATA
Hz
Sinc3 Filter
â3dB
0.262 Ã fDATA
Hz
Programmable Gain Amplifier
User-Selectable Gain Ranges
1
128
Input Capacitance
9
pF
Input Leakage Current
Modulator Off, T = +25°C
5
pA
Burnout Current Sources
2
µA
OFFSET DAC
Offset DAC Range
Offset DAC Monotonicity
±VREF/(2 à PGA)
V
8
Bits
Offset DAC Gain Error
±10
%
Offset DAC Gain Error Drift
2
ppm/°C
SYSTEM PERFORMANCE
Resolution
24
Bits
No Missing Codes
24
Bits
Integral Nonlinearity
End Point Fit
±0.0015
% of FS
Offset Error(1)
Before Calibration
15
ppm of FS
Offset Drift(1)
0.04
ppm of FS/°C
Gain Error
After Calibration
0.010
%
Gain Error Drift(1)
1.0
ppm/°C
Common-Mode Rejection
at DC
100
dB
Normal-Mode Rejection
Output Noise
fCM = 60Hz, fDATA = 10Hz
fCM = 50Hz, fDATA = 50Hz
fCM = 60Hz, fDATA = 60Hz
fSIG = 50Hz, fDATA = 50Hz
fSIG = 60Hz, fDATA = 60Hz
130
dB
120
dB
120
dB
100
dB
100
dB
See Typical Characteristics
Power-Supply Rejection
at DC, dB = â20 log(âVOUT/âVDD)(2)
75
90
dB
VOLTAGE REFERENCE INPUT
Reference Input Range
VREF
Common-Mode Rejection
REF IN+, REF INâ
0
VREF â¡ (REF IN+) â (REF INâ)
0.1
at DC
AVDD
V
1.25
V
120
dB
Common-Mode Rejection
Bias Current(3)
fVREFCM = 60Hz, fDATA = 60Hz
VREF = 1.25V
120
dB
0.65
µA
(1) Calibration can minimize these errors.
(2) âVOUT is change in digital result.
(3) 12pF switched capacitor at fSAMP clock frequency.
5
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