ADS1218_14 Datasheet, PDF (27/45 Pages) Texas Instruments – 8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER with FLASH Memory

ADS1218
www.ti.com
SBAS187C – SEPTEMBER 2001 – REVISED SEPTEMBER 2005
COMMAND DEFINITIONS
The commands listed below control the operation of
the ADS1218. Some of the commands are
stand-alone commands (e.g., RESET) while others
require additional bytes (e.g., WREG requires
command, count, and the data bytes). Commands
that output data require a minimum of four f_OSC cycles
before the data is ready (e.g., RDATA).
Operands: n = count (0 to 127)
r = register (0 to 15)
x = don’t care
a = RAM bank address (0 to 7)
f = Flash memory page address (0 to 31)
Table 3. Command Summary
COMMANDS
DESCRIPTION
COMMAND BYTE⁽¹⁾
2ND COMMAND BYTE
RDATA
RDATAC
STOPC
RREG
RRAM
CREG
CREGA
WREG
WRAM
RF2R
WR2F
CRAM
CSRAMX
CSARAMX
CSREG
CSRAM
CSARAM
CSFL
SELFCAL
SELFOCAL
SELFGCAL
SYSOCAL
SYSGCAL
DSYNC
SLEEP
RESET
Read Data
Read Data Continuously
Stop Read Data Continuously
Read from REG Bank rrrr
Read from RAM Bank aaa
Copy REGs to RAM Bank aaa
Copy REGS to all RAM Banks
Write to REG rrrr
Write to RAM Bank aaa
Read Flash page to RAM
Write RAM to Flash page
Copy RAM Bank aaa to REG
Calc RAM Bank aaa Checksum
Calc all RAM Bank Checksum
Calc REG Checksum
Calc RAM Bank aaa Checksum
Calc all RAM Banks Checksum
Calc Flash Checksum
Self Cal Offset and Gain
Self Cal Offset
Self Cal Gain
Sys Cal Offset
Sys Cal Gain
Sync DRDY
Put in SLEEP Mode
Reset to Power-Up Values
0000 0001 (01_H)
0000 0011 (03_H)
0000 1111 (0F_H)
0001 r r r r (1x_H)
0010 0aaa (2x_H)
0100 0aaa (4x_H)
0100 1000 (48_H)
0101 r r r r (5x_H)
0110 0aaa (6x_H)
100f f f f f (8, 9x_H)
101f f f f f (A, Bx_H)
1100 0aaa (Cx_H)
1101 0aaa (Dx_H)
1101 1000 (D8_H)
1101 1111 (DF_H)
1110 0aaa (Ex_H)
1110 1000 (E8_H)
1110 1100 (EC_H)
1111 0000 (F0_H)
1111 0001 (F1_H)
1111 0010 (F2_H)
1111 0011 (F3_H)
1111 0100 (F4_H)
1111 1100 (FC_H)
1111 1101 (FD_H)
1111 1110 (FE_H)
—
—
—
xxxx_nnnn (# of reg–1)
xnnn_nnnn (# of bytes–1)
—
—
xxxx_nnnn (# of reg–1)
xnnn_nnnn (# of bytes–1)
—
—
—
—
—
—
—
—
—
—
—
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—
—
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(1) The data input received by the ADS1218 is always MSB first. The data out format is set by the BIT ORDER bit in ACR reg.
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