ADS1218_14 Datasheet, PDF (37/45 Pages) Texas Instruments – 8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER with FLASH Memory

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DEFINITION OF RULES
Analog Input Voltage—the voltage at any one
analog input relative to AGND.
Analog Input Differential Voltage—given by the
following equation: (A_IN+) – (A_IN–). Thus, a positive
digital output is produced whenever the analog input
differential voltage is positive, while a negative digital
output is produced whenever the differential is
negative.
For example, when the converter is configured with a
2.5V reference and placed in a gain setting of 1, the
positive full-scale output is produced when the analog
input differential is 2.5V. The negative full-scale
output is produced when the differential is –2.5V. In
each case, the actual input voltages must remain
within the AGND to AV_DD range.
Conversion Cycle—the term conversion cycle
usually refers to a discrete A/D conversion operation,
such as that performed by a successive
approximation converter. As used here, a conversion
cycle refers to the t_DATA time period. However, each
digital output is actually based on the modulator
results from several t_DATA time periods.
FILTER SETTING
MODULATOR RESULTS
Fast Settling
Sinc²
Sinc³
1 t_DATA Time Period
2 t_DATA Time Period
3 t_DATA Time Period
Data Rate—the rate at which conversions are
completed. See definition for f_DATA.
Decimation Ratio—defines the ratio between the
output of the modulator and the output Data Rate.
Valid values for the Decimation Ratio are from 20 to
2047. Larger Decimation Ratios will have lower noise.
Effective Resolution—the effective resolution of the
ADS1218 in a particular configuration can be
expressed in two different units: bits rms (referenced
to output) and Vrms (referenced to input). Computed
directly from the converter’s output data, each is a
statistical calculation. The conversion from one to the
other is shown below.
Effective number of bits (ENOB) or effective
resolution is commonly used to define the usable
resolution of the A/D converter. It is calculated from
empirical data taken directly from the device. It is
typically determined by applying a fixed known signal
source to the analog input and computing the
standard deviation of the data sample set. The rms
noise defines the ±σ interval about the sample mean.
ADS1218
SBAS187C – SEPTEMBER 2001 – REVISED SEPTEMBER 2005
The data from the A/D converter is output as codes,
which then can be easily converted to other units,
such as ppm or volts. The equations and table below
show the relationship between bits or codes, ppm,
and volts.
ENOB
+
−20
log(ppm)
6.02
BITS rms
24
22
20
18
16
14
12
BIPOLAR Vrms
ǒ Ǔ 2 VREF
PGA
10^{ǒ6.0220 ERǓ}
298nV
1.19µV
4.77µV
19.1µV
76.4µV
505µV
1.22mV
UNIPOLAR Vrms
ǒ Ǔ VREF
PGA
10
ǒ6.02
20
ER_Ǔ
149nV
597nV
2.39µV
9.55µV
38.2µV
152.7µV
610µV
f_DATA—the frequency of the digital output data
produced by the ADS1218. f_DATA is also referred to as
the Data Rate.
ǒ Ǔ ǒ Ǔ f_DATA +
f _MOD
Decimation Ratio
+
mfactor
f_OSC
Decimation Ratio
f_MOD—the frequency or speed at which the modulator
of the ADS1218 is running. This depends on the
SPEED bit as shown below:
SPEED BIT
0
1
f_MOD
f_OSC/128
f_OSC/256
f_OSC—the frequency of the crystal input signal at the
X_IN input of the ADS1218.
f_SAMP—the frequency, or switching speed, of the input
sampling capacitor. The value is given by one of the
following equations:
PGA SETTING
1, 2, 4, 8
SAMPLING FREQUENCY
f _SAMP
+
f_OSC
mfactor
8
f _SAMP
+
2f _OSC
mfactor
16
f _SAMP
+
8f _OSC
mfactor
32
f _SAMP
+
16f_OSC
mfactor
64, 128
f _SAMP
+
16f_OSC
mfactor
37