ADS1218_14 Datasheet, PDF (19/45 Pages) Texas Instruments – 8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER with FLASH Memory

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ADS1218
SBAS187C – SEPTEMBER 2001 – REVISED SEPTEMBER 2005
SINC³ FILTER RESPONSE⁽¹⁾
(−3dB = 0.262 • f_DATA = 15.76Hz)
0
−20
−40
−60
−80
−100
−120
0
30 60 90 120 150 180 210 240 270 300
Frequency (Hz)
SINC² FILTER RESPONSE⁽¹⁾
(−3dB = 0.318 • f_DATA = 19.11Hz)
0
−20
−40
−60
−80
−100
−120
0
30 60 90 120 150 180 210 240 270 300
Frequency (Hz)
FAST SETTLING FILTER RESPONSE⁽¹⁾
(−3dB = 0.469 • f_DATA = 28.125Hz)
0
−20
−40
−60
−80
−100
−120
0
30 60 90 120 150 180 210 240 270 300
Frequency (Hz)
NOTE: (1) f_DATA = 60Hz.
Figure 28. Filter Frequency Responses
DIGITAL I/O INTERFACE
The ADS1218 has eight pins dedicated for digital I/O.
The default power-up condition for the digital I/O pins
are as inputs. All of the digital I/O pins are individually
configurable as inputs or outputs. They are
configured through the DIR control register. The DIR
register defines whether the pin is an input or output,
and the DIO register defines the state of the digital
output. When the digital I/O are configured as inputs,
DIO is used to read the state of the pin. If the digital
I/O are not used, either 1) configure as outputs; or 2)
leave as inputs and tie to ground; this prevents
excess power dissipation.
SERIAL PERIPHERAL INTERFACE
The Serial Peripheral Interface (SPI) allows a
controller to communicate synchronously with the
ADS1218. The ADS1218 operates in slave-only
mode.
Chip Select (CS)
The chip select (CS) input of the ADS1218 must be
externally asserted before a master device can
exchange data with the ADS1218. CS must be low
for the duration of the transaction. CS can be tied
low.
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