ADS1218_14 Datasheet, PDF (18/45 Pages) Texas Instruments – 8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER with FLASH Memory

ADS1218
SBAS187C – SEPTEMBER 2001 – REVISED SEPTEMBER 2005
Calibration must be performed after power on, a
change in decimation ratio, or a change of the PGA.
For operation with a reference voltage greater than
(AV_DD– 1.5V), the buffer must also be turned off
during calibration.
At the completion of calibration, the DRDY signal
goes low, which indicates the calibration is finished
and valid data is available. See Application Report
Calibration Routine and Register Value Generation
for the ADS121x Series (SBAA099) for more
information.
DIGITAL FILTER
The Digital Filter can use either the fast settling,
sinc², or sinc³ filter, as shown in Figure 27. In
addition, the Auto mode changes the sinc filter after
the input channel or PGA is changed. When
switching to a new channel, it will use the fast settling
filter for the next two conversions, the first of which
should be discarded. It will then use the sinc²
followed by the sinc³ filter. This combines the
low-noise advantage of the sinc³ filter with the quick
response of the fast settling time filter. See Figure 28
for the frequency response of each filter.
When using the fast setting filter, select a decimation
value set by the DEC0 and M/DEC1 registers that is
evenly divisible by four for the best gain accuracy.
For example, choose 260 rather than 261.
www.ti.com
Adjustable Digital Filter
Sinc³
Modulator
Output
Sinc²
Data Out
Fast Settling
FILTER SETTLING TIME
FILTER
SETTLING TIME
(Conversion Cycles)
Sinc³
3⁽¹⁾
Sinc²
2⁽¹⁾
Fast
1⁽¹⁾
NOTE: (1) With Synchronized Channel Changes.
AUTO MODE FILTER SELECTION
CONVERSION CYCLE
1
2
3
Discard
Fast
Sinc²
4
Sinc³
Figure 27. Filter Step Responses
18