ADS1218_14 Datasheet, PDF (21/45 Pages) Texas Instruments – 8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER with FLASH Memory

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The RAM provides eight banks, with a bank
consisting of 16 bytes. The total size of the RAM is
128 bytes. Copies between the registers and RAM
are performed on a bank basis. Also, the RAM can
be directly read or written through the serial interface
on power-up. The banks allow separate storage of
settings for each input.
The RAM address space is linear; therefore,
accessing RAM is done using an auto-incrementing
pointer. Access to RAM in the entire memory map
can be done consecutively without having to address
each bank individually. For example, if you were
currently accessing bank 0 at offset 0xF (the last
location of bank 0), the next access would be bank 1
and offset 0x0. Any access after bank 7 and offset
0xF will wrap around to bank 0 and Offset 0x0.
Although the Register Bank memory is linear, the
concept of addressing the device can also be thought
of in terms of bank and offset addressing. Looking at
linear and bank addressing syntax, we have the
following comparison: in the linear memory map, the
address 0x14 is equivalent to bank 1 and offset 0x4.
Simply stated, the most significant four bits represent
the bank, and the least significant four bits represent
the offset. The offset is equivalent to the register
address for that bank of memory.
FLASH
Reads and Writes to Flash occur on a Page basis.
Therefore, the entire contents of RAM is used for
both Read and Write operations. The Flash is
independent of the Registers; for example, the Flash
can be used as general-purpose Flash.
Upon power-up or reset, the contents of Flash Page 0
are loaded into RAM. Subsequently, the contents of
RAM Bank 0 are loaded into the configuration
register. Therefore, the user can customize the
power-up configuration for the device. Care should be
taken to ensure that data for Flash Page 0 is written
correctly, in order to prevent unexpected operation
upon power-up.
ADS1218
SBAS187C – SEPTEMBER 2001 – REVISED SEPTEMBER 2005
The ADS1218 supports any combination of eight
analog inputs and the Flash memory supports up to
32 unique Page configurations. With this flexibility,
the device could support 32 unique configurations for
each of the eight analog input channels. For instance,
the on-chip temperature sensor could be used to
monitor temperature, then different calibration
coefficients could be recalled for each of the eight
analog input channels based on the change in
temperature. This would enable the user to recall
calibration coefficients for every 4°C change in
temperature over the industrial temperature range,
which could be used to correct for drift errors.
Checksum commands are also included, which can
be used to verify the integrity of Flash.
The following two commands can be used to
manipulate the Flash. First, the contents of Flash can
be written to with the WR2F (write RAM to Flash)
command. This command first erases the designated
Flash page and then writes the entire content of RAM
(all banks) into the designated Flash page. Second,
the contents of Flash can be read with the RF2R
(read Flash to RAM) command. This command reads
the designated Flash page into the entire contents of
RAM (all banks). In order to ensure maximum
endurance and data retention, the SPEED bit in the
SETUP register must be set for the appropriate f_OSC
frequency.
Writing to or erasing Flash can be disabled either
through the WREN pin or the WREN register bit. If
the WREN pin is low OR the WREN bit is cleared,
then the WR2F command has no effect. This protects
the integrity of the Flash data from being
inadvertently corrupted.
Accessing the Flash data either through read, write,
or erase may affect the accuracy of the conversion
result. Therefore, the conversion result should be
discarded when accesses to Flash are done.
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