THS789 Datasheet, PDF (4/34 Pages) Texas Instruments – THS789 Quad-Channel Time Measurement Unit (TMU)

THS789
SLOS776A – SEPTEMBER 2012 – REVISED DECEMBER 2015
NAME
EventA
EventA
EventB
EventB
EventC
EventC
EventD
EventD
GND
HCLK
Hdata
Hstrobe
MCLK
MCLK
NC
OT_ALARM
RCLK
RCLK
RdataA
RdataA
RdataB
RdataB
RdataC
RdataC
RdataD
RdataD
Reserved
Reset
RstrobeA
RstrobeA
RstrobeB
RstrobeB
RstrobeC
RstrobeC
RstrobeD
RstrobeD
SYNC
SYNC
TEMP
VCC
Pin Functions
PIN
NO.
TYPE
68
LVDS-compatible input
66
LVDS-compatible input
61
LVDS-compatible input
63
LVDS-compatible input
8
LVDS-compatible input
10
LVDS-compatible input
15
LVDS-compatible input
13
LVDS-compatible input
1, 2, 11, 12, 21, 25, 32, 35, 37, 39,
42, 55, 64, 65, 74, 75, 82, 84, 85, Ground
87, 89, 92, 94
34
LVCMOS input
33
LVCMOS I/O
41
LVCMOS input
19
LVDS-compatible input
20
LVDS-compatible input
3–6, 9, 14, 17, 18, 26, 50, 54, 59,
62, 67, 70–73, 76, 100
No connect
53
Open-drain output
45
LVDS-compatible output
44
LVDS-compatible output
78
LVDS-compatible output
79
LVDS-compatible output
49
LVDS-compatible output
48
LVDS-compatible output
98
LVDS-compatible output
97
LVDS-compatible output
27
LVDS-compatible output
28
LVDS-compatible output
23, 24, 90, 91
Engineering or test pins
51
LVCMOS input
80
LVDS-compatible output
81
LVDS-compatible output
47
LVDS-compatible output
46
LVDS-compatible output
96
LVDS-compatible output
95
LVDS-compatible output
29
LVDS-compatible output
30
LVDS-compatible output
57
LVDS-compatible input
56
LVDS-compatible input
52
Analog output
7, 16, 22, 31, 36, 38, 40, 43, 58,
60, 69, 77, 83, 86, 88, 93, 99
Power supply
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DESCRIPTION
Positive event input for channel A
Negative event input for channel A
Positive event input for channel B
Negative event input for channel B
Positive event input for channel C
Negative event input for channel C
Positive event input for channel D
Negative event input for channel D
Chip ground
Host serial-interface clock
Host serial-interface data I/O
Host serial-interface chip select
Positive master-clock input
Negative master-clock input
Physically not connected to silicon
Overtemperature alarm
Positive result-interface clock
Negative result-interface clock
Positive result-data output for channel A
Negative result-data output for channel A
Positive result-data output for channel B
Negative result-data output for channel B
Positive result-data output for channel C
Negative result-data output for channel C
Positive result-data output for channel D
Negative result-data output for channel D
Connect to VCC
Chip reset, active-low
Positive strobe signal for channel A
Negative strobe signal for channel A
Positive strobe signal for channel B
Negative strobe signal for channel B
Positive strobe signal for channel C
Negative strobe signal for channel C
Positive strobe signal for channel D
Negative strobe signal for channel D
Positive input for sync channel
Negative input for sync channel
Die temperature
Positive supply, nominal 3.3 V
4
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