THS789 Datasheet, PDF (30/34 Pages) Texas Instruments – THS789 Quad-Channel Time Measurement Unit (TMU)

THS789
SLOS776A – SEPTEMBER 2012 – REVISED DECEMBER 2015
8.2.3 Application Curve
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920
75 MHz
900
150 MHz
300 MHz
880
34-bit Counter
27-bit Counter
860
840
820
18-bit Counter
800
780
760
8 16 24 32 40 8 16 24 32 40 8 16 24 32 40
Rdata Size
D001
Figure 14. 4-Channel Supply Current vs Rdata, Counter, and Rclock Functional Modes
9 Power Supply Recommendations
All the high-speed time-measurement circuitry in the TMU is implemented in differential emitter-coupled logic
(ECL). Besides high speed, a characteristic of differential ECL is good rejection of power-supply noise and
variation. However, there is a great deal of CMOS logic, FIFO and output-serial interface circuitry that is an
excellent source of power-supply current noise. Therefore, to maintain the best accuracy, the TMU power supply
must be low-impedance. This is accomplished in the usual ways by careful layout, good ground and power
planes, short traces to the power and ground pins, and capacitive bypassing. TI recommends placing a quality,
low inductance, high-frequency bypass capacitor of approximately 0.01 μF close to each power pin. The 0402
size works well. Additional bypass capacitors of larger value should be placed near the TMU, making low-
inductance connection with the power and ground planes. With a typical power-supply sensitivity of 30 ps/V, a
1% power supply shift yields a 1-picosecond additional error, making power-supply regulation important for the
best accuracy.
10 Layout
10.1 Layout Guidelines
Figure 15 and Figure 16 show typical layout examples for this device.
Use 100-Ω terminating resistors for all LVDS inputs. TI recommends placing all the LVDS input resistors as close
as possible to the device (the six pairs of pads are shown in Figure 16 on the left and right sides). The other
pads found on the bottom side image are the pairs of decoupling capacitors (0.1 µF and 0.01 µF) for the multiple
V_DD pins. As noted before, keep the distance between these caps, V_DD, and Ground as short as possible.
Keep all differential signals as close as possible to the same length to reduce inaccuracies in timestamp
measurement.
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