LMH0318_15 Datasheet, PDF (4/57 Pages) Texas Instruments – LMH0318 3 Gbps HD/SD SDI Reclocker with Integrated Cable Driver

LMH0318
SNLS508 – SEPTEMBER 2015
www.ti.com
Pin Descriptions – SPI Mode/ Mode_SEL = 1 kΩ to VDD
PIN
I/O
NAME
NO.
DESCRIPTION
CONTROL/INDICATOR I/O
MODE_SEL
Determines Device Configuration: SPI or SMBus
1
Input, 4-Level 1 kΩ to VDD:
• SPI mode. See Initialization Set Up
SS_N
2
Input, 2-Level SPI Slave Select. . This pin has internal pull up
SCK
3
Input, 2.5V
LVCMOS, 2-Level
SPI serial clock input
MOSI
4
Input, 2-Level SPI Master Output / Slave Input. LMH0318 SPI data receive
RESERVED
5,14,17,
18
No Connect
ENABLE
Powers down device when pulled low
1 kΩ to VDD:
• Power down until valid signal detected
Float(Default):
6
Input, 4-Level
• Reserved
20 kΩ to GND:
• Reserved
1 kΩ to GND:
• Power down including signal detects and Reset Registers upon
power-up
LOS_INT_N
Output,
Programmable Interrupt caused by change in LOS, violation of internal
13
LVCMOS Open eye monitor threshold, or change in lock. External 4.7-kΩ pull-up resistor
Drain, 2-Level is required. This pin is 3.3 V LVCMOS tolerant.
MISO
15
Output, 2.5 V
LVCMOS, 2-Level
SPI Master Input / Slave Output. LMH0318 SPI data transmit
LOCK
Indicates CDR lock detect status
High:
16
Output, 2.5V
LVCMOS, 2-Level
• CDR locked
Low:
• CDR not locked
HIGH SPEED DIFFERENTIAL I/O
IN0+
IN0-
11
Input, Analog Inverting and non-inverting differential inputs. An on-chip 100 Ω
terminating resistor connects IN0+ to IN0-. Inputs require 4.7 µF AC
12
Input, Analog _{coupling capacitors.}
IN1+
IN1-
8
Input, Analog Inverting and non-inverting differential inputs. An on-chip 100 Ω
terminating resistor connects IN1+ to IN1-. Inputs require 4.7 µF AC
9
Input, Analog _{coupling capacitors.}
OUT0+
OUT0-
20
Output, 75 Ω CML
Compatible
Inverting and non-inverting 75 Ω outputs. An on-chip 75 Ω terminating
resistor connects OUT0+ and OUT0- to VDD. Outputs require 4.7 µF AC
19
Output, 75 Ω CML _{coupling capacitors}
Compatible
OUT1+
OUT1-
23
Output, Analog Inverting and non-inverting differential outputs. An on-chip 100 Ω
terminating resistor connects OUT1+ to OUT1-. Outputs require 4.7 µF AC
22
Output, Analog _{coupling capacitors}
POWER
VDD
7, 21
2.5 V Supply 2.5 V ± 5%
VSS
10, 24
Ground
Connect directly to ground (GND)
DAP
Ground
Exposed DAP, connect to GND using at least 5 vias (see Figure 23 )
4
Submit Documentation Feedback
Product Folder Links: LMH0318
Copyright © 2015, Texas Instruments Incorporated