LMH0318_15 Datasheet, PDF (1/57 Pages) Texas Instruments – LMH0318 3 Gbps HD/SD SDI Reclocker with Integrated Cable Driver

Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
LMH0318
SNLS508 – SEPTEMBER 2015
LMH0318 3 Gbps HD/SD SDI Reclocker with Integrated Cable Driver
1 Features
•1 Supports ST 424(3G), 292(HD), 259(SD), MADI,
and DVB-ASI
• Locks to rates 2.97 Gbps, 1.485 Gbps, or Divided
by 1.001 sub-rates, and DVB-ASI
• Reference-free Operation with Fast Lock Time
covering all Supported or Selected Data Rates
• 75 Ω and 100 Ω Transmitter Outputs
• Integrated 2:1 Mux Input, 1:2 Demux/Fanout
Outputs
• Automatic Slew Rate Based on Input Rate Detect
• On-chip Eye Monitor
• Low 300 mW Power Consumption With Automatic
Power Down On Loss Of Input Signal
• Programmable via SPI, Or SMBus Interface
• Single 2.5 V Supply Operation
• Small 4 mm × 4 mm 24-pin QFN Package
• -40°C to +85°C Operating Temperature Range
• Footprint compatible with LMH1218 for easy
upgrade to 12G
2 Applications
• SMPTE Compatible Serial Digital Interface (SDI)
• Broadcast Video Routers, Switches, and Monitors
• Digital Video Processing and Editing
• DVB-ASI and Distribution Amplifiers
3 Description
The LMH0318 is a 3 Gbps HD/SD SDI Reclocker with
Integrated Cable Driver designed to drive serial video
data compatible to SMPTE-SDI and DVB-ASI
standards. The clock and data recovery circuit
eliminates accumulated jitter and detects the
incoming data rate without requiring an external
reference clock. The integrated driver with 75 ohm
and 50 ohm outputs enables multiple media options
such as coax and FR4 PCB.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LMH0318
WQFN (24)
4 mm × 4 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified SPI Schematic
VDD
VDD
VDD
FPGA
FPGA
ENABLE
.:
MODE_SEL
.:
0.01 PF
0.01 PF
OUT
6
11
IN0+
100: Differential T-Line ^{4.7 PF}
OUT
12
IN0-
OUT
8 _IN1+
100: Differential T-Line _{4.7 PF}
OUT
9 _IN1-
SS_N
2
1
7 21
4.7 PF
OUT0+ ₂₀
:T-Line
LMH0318
OUT0- ₁₉
DAP
VSS ₂₄
VSS ₁₀
4.7 PF
:
4.7 PF
OUT1+
IN+
23
100: Differential T-Line
OUT1-
IN-
22
3 4 13 15 16
SCK
MOSI
LOS_INT_N
MISO
LOCK
FPGA
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.