LMH0318_15 Datasheet, PDF (34/57 Pages) Texas Instruments – LMH0318 3 Gbps HD/SD SDI Reclocker with Integrated Cable Driver

LMH0318
SNLS508 – SEPTEMBER 2015
REGISTER NAME
BST_Indx13
BST_Indx14
BST_Indx15
Active_EQ
EQ_Control
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BITS
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Table 6. Receiver Registers (continued)
FIELD REGISTER
ADDRESS
Reg 0x4D Channel
I13_BST0[1]
I13_BST0[0]
I13_BST1[1]
I13_BST1[0]
I13_BST2[1]
I13_BST2[0]
I13_BST3[1]
I13_BST3[0]
Reg 0x4E Channel
I14_BST0[1]
I14_BST0[0]
I14_BST1[1]
I14_BST1[0]
I14_BST2[1]
I14_BST2[0]
I14_BST3[1]
I14_BST3[0]
Reg 0x4F Channel
I15_BST0[1]
I15_BST0[0]
I15_BST1[1]
I15_BST1[0]
I15_BST2[1]
I15_BST2[0]
I15_BST3[1]
I15_BST3[0]
Reg 0x52 Channel
eq_bst_to_ana[7]
eq_bst_to_ana[6]
eq_bst_to_ana[5]
eq_bst_to_ana[4]
eq_bst_to_ana[3]
eq_bst_to_ana[2]
eq_bst_to_ana[1]
eq_bst_to_ana[0]
Reg 0x55 Channel
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INIT_CDR_SM_4
Reserved
DEFAULT
0xA5
1
0
1
0
0
1
0
1
0xE6
1
1
1
0
0
1
1
0
0xF9
1
1
1
1
1
0
0
1
0x00
0
0
0
0
0
0
0
0
0x00
0
0
0
0
0
0
0
0
R/RW
DESCRIPTION
Index13 4 Stage EQ Boost.
RW Index 13 Boost Stage 0 bit 1
RW Index 13 Boost Stage 0 bit 0
RW Index 13 Boost Stage 1 bit 1
RW Index 13 Boost Stage 1 bit 0
RW Index 13 Boost Stage 2 bit 1
RW Index 13 Boost Stage 2 bit 0
RW Index 13 Boost Stage 3 bit 1
RW Index 13 Boost Stage 3 bit 0
Index14 4 Stage EQ Boost.
RW Index 14 Boost Stage 0 bit 1
RW Index 14 Boost Stage 0 bit 0
RW Index 14 Boost Stage 1 bit 1
RW Index 14 Boost Stage 1 bit 0
RW Index 14 Boost Stage 2 bit 1
RW Index 14 Boost Stage 2 bit 0
RW Index 14 Boost Stage 3 bit 1
RW Index 14 Boost Stage 3 bit 0
Index15 4 Stage EQ Boost.
RW Index 15 Boost Stage 0 bit 1
RW Index 15 Boost Stage 0 bit 0
RW Index 15 Boost Stage 1 bit 1
RW Index 15 Boost Stage 1 bit 0
RW Index 15 Boost Stage 2 bit 1
RW Index 15 Boost Stage 2 bit 0
RW Index 15 Boost Stage 3 bit 1
RW Index 15 Boost Stage 3 bit 0
Active CTLE Boost Setting Read Back
R Read-back returns CTLE boost settings
R
R
R
R
R
R
R
EQ Adaptation Control
R
RW
RW
RW
RW
RW
RW
At power-up, this bit needs to be set to
1'b. See initialization set up
RW
34
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