LMH0318_15 Datasheet, PDF (25/57 Pages) Texas Instruments – LMH0318 3 Gbps HD/SD SDI Reclocker with Integrated Cable Driver

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LMH0318
SNLS508 – SEPTEMBER 2015
Programming (continued)
8.5.1 Register Maps
The LMH0318 register set definition is organized into four groups:
1. Global Registers: Chip ID, Interrupt status, LOS registers
2. Receiver Registers: Equalizer boost settings and signal detect setting
3. CDR Registers: PLL control
4. Transmitter Registers: OUT0 and OUT1 parameter setting
The typical device initialization sequence for the LMH0318 includes the followings. For detailed register settings
See LMH0318 Programming Guide (SNLU183).
1. Shared Register Configuration
(a) Reading device ID
(b) Selecting interrupt on to LOS pin
(c) Settings up the register to access the channel registers
2. Channel Register Configuration
(a) CDR Reset
(b) Interrupt register configuration
(c) Optional Input/Output selection
(d) Optional VOD selection
(e) CDR Reset and Release
8.5.2 Global Registers
REGISTER NAME
SMBus Observation
Reset Shared Regs
Enable SMBus Strap
BITS
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
Table 5. Global Registers
FIELD REGISTER
ADDRESS
Reg_0x00 Share
SMBUS_addr3
SMBUS_addr2
SMBUS_addr1
SMBUS_addr0
Reserved
Reserved
Reserved
Reserved
Reg 0x04 Share
Reserved
rst_i2c_regs
DEFAULT
0x00
0
0
0
0
0
0
0
0
0x01
0
0
R/RW
R
R
R
R
RW
RW
RW
RW
RW
RW
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reg 0x06 Share
Reserved
Reserved
Reserved
Reserved
0
RW
0
RW
0
RW
0
RW
0
RW
1
RW
0x00
0
RW
0
RW
0
RW
0
RW
DESCRIPTION
SMBus Address Observation
SMBus strap observation
Shared Register Reset
1: Reset Shared Registers
0: Normal operation
Allow SMBus strap observation
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