LMH0318_15 Datasheet, PDF (35/57 Pages) Texas Instruments – LMH0318 3 Gbps HD/SD SDI Reclocker with Integrated Cable Driver

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LMH0318
SNLS508 – SEPTEMBER 2015
8.5.4 CDR Registers
REGISTER
NAME
Output_Mux_OV
CDR_Reset
CDR_Status
EOM_Vrange
BITS
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Table 7. CDR Registers
FIELD REGISTER
ADDRESS
Reg 0x09 Channel
Reserved
Reserved
DEFAULT
0x00
0
0
R/RW
RW
RW
Reg_bypass_pfd_ovd
0
RW
Reserved
Reserved
Reserved
Reserved
Reserved
Reg 0x0A Channel
Reserved
Reserved
Reserved
Reserved
reg_cdr_reset_ov
reg_cdr_reset_sm
Reserved
Reserved
Reg 0x0C Channel
reg_sh_status_control[3]
reg_sh_status_control[2]
reg_sh_status_control[1]
reg_sh_status_control[0]
Reserved
Reserved
Reserved
Reserved
Reg 0x11 Channel
eom_sel_vrange[1]
eom_sel_vrange[0]
0
RW
0
RW
0
RW
0
RW
0
RW
0x50
0
RW
1
RW
0
RW
1
RW
0
RW
0
RW
0
RW
0
RW
0x08
0
RW
0
RW
0
RW
0
RW
1
RW
0
RW
0
RW
0
RW
0xE0
11
RW
eom_PD
Reserved
Reserved
Reserved
Reserved
Reserved
1
RW
0
RW
0
RW
0
RW
0
RW
0
RW
DESCRIPTION
Output Data Mux Override
1: Enable values from 0x1E[7:5] &
0x1C[7:5] to control output mux
0: Register 0x1C[3:2] determines the
output selection
CDR State Machine Reset
1: Enable 0x0A[2] to control CDR Reset
0: Disable CDR Reset
1: Enable CDR Reset if 0x0A[3] = 1'b
0: Disable CDR Reset if 0x0A[3] = 1'b
CDR Status Control
Determines what is shown in Reg 0x02.
See LMH0318 Programming Guide
(SNLU183)
EOM Vrange Setting and EOM Power
Down Control
Sets eye monitor ADC granularity if
0x2C[6] =0'b
00: 3.125 mV
01: 6.25 mV
10: 9.375 mV
11: 12.5 mV
0: EOM Operational
1: Power down EOM
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