BQ25890H Datasheet, PDF (37/66 Pages) Texas Instruments – I2C Controlled Single Cell 5-A Fast Charger

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BQ25890H
SLUSCC5 – SEPTEMBER 2016
8.4.3 REG02
Figure 28. REG02
7
6
5
4
3
2
1
0
0
0
0
1
1
1
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10. REG02
Bit
Field
7
CONV_START
6
CONV_RATE
5
BOOST_FREQ
4
ICO_EN
3
HVDCP_EN
2
MAXC_EN
1
FORCE_DPDM
0
AUTO_DPDM_EN
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
by REG_RST
by Watchdog
by REG_RST
by Watchdog
by REG_RST
by Watchdog
by REG_RST
by REG_RST
by REG_RST
by REG_RST
by Watchdog
by REG_RST
Description
ADC Conversion Start Control
0 – ADC conversion not active (default).
1 – Start ADC Conversion
This bit is read-only when CONV_RATE = 1. The bit stays high during
ADC conversion and during input source detection.
ADC Conversion Rate Selection
0 – One shot ADC conversion (default)
1 – Start 1s Continuous Conversion
Boost Mode Frequency Selection
0 – 1.5MHz
1 – 500KHz
Note: Write to this bit is ignored when OTG_CONFIG is enabled.
Input Current Optimizer (ICO) Enable
0 – Disable ICO Algorithm
1 – Enable ICO Algorithm (default)
High Voltage DCP Enable
0 – Disable HVDCP handshake
1 – Enable HVDCP handshake (default)
MaxCharge Adapter Enable
0 – Disable MaxCharge handshake
1 – Enable MaxCharge handshake (default)
Force D+/D- Detection
0 – Not in D+/D- or PSEL detection (default)
1 – Force D+/D- detection
Automatic D+/D- Detection Enable
0 –Disable D+/D- or PSEL detection when VBUS is plugged-in
1 –Enable D+/D- or PEL detection when VBUS is plugged-in (default)
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