BQ25890H Datasheet, PDF (10/66 Pages) Texas Instruments – I2C Controlled Single Cell 5-A Fast Charger

BQ25890H
SLUSCC5 – SEPTEMBER 2016
www.ti.com
Electrical Characteristics (continued)
V_{VBUS_UVLOZ} < V_VBUS < V_ACOV and V_VBUS > V_BAT + V_SLEEP, T_J = –40°C to +125°C and T_J = 25°C for typical values (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT VOLTAGE / CURRENT REGULATION
V_{IN(DPM_RANGE)}
V_{IN(DPM_STEP)}
V_{IN(DPM_ACC)}
I_{IN(DPM_RANGE)}
I_{IN(DPM_STEP)}
I_{IN(DPM100_ACC)}
Typical Input voltage regulation range
Typical Input voltage regulation step
Input voltage regulation accuracy
Typical Input current regulation range
Typical Input current regulation step
Input current 100-mA regulation accuracy
V_BAT = 5 V, current pulled from SW
VINDPM = 4.4 V, 9 V, T_J = –40°C to +105°C
IINLIM (REG00[5:0]) =100 mA
USB150, IINLIM (REG00[5:0]) = 150 mA
3.9
15.3
V
100
mV
3%
3%
100
3250
mA
50
mA
85
90
100
mA
125
135
150
mA
I_{IN(DPM_ACC)}
Input current regulation accuracy
V_BAT = 5 V, current pulled from SW
USB500, IINLIM (REG00[5:0]) = 500 mA
USB900, IINLIM (REG00[5:0]) = 900 mA
Adapter 1.5 A, IINLIM (REG00[5:0]) = 1500
mA
440
750
1300
470
825
1400
500
mA
900
mA
1500
mA
I_IN(START)
K_ILIM
D+/D- DETECTION
Input current regulation during system start up
I_INMAX = K_ILIM/R_ILIM
V_SYS = 2.2 V, IINLIM (REG00[5:0])> = 200 mA
200
mA
Input current regulation by ILIM pin = 1.5 A
315
350
385 A x Ω
V_{(0P0_VSRC)}
D+/D– voltage source (0 V)
I(DP) < 1 mA; DP_DAC=001 or
DM_DAC=001
-0.15
0
0.15
V
V_{(0P6_VSRC)}
D+/D– voltage source (0.6 V)
I(DP) < 1 mA; DP_DAC=010
or
I(DM) < 1 m; ADM_DAC=010
0.5
0.6
0.7
V
V_{(1P2_VSRC)}
D+/D– voltage source (1.2 V)
I(DP) < 1 mA; DP_DAC=011
or
I(DM) < 1 m; DM_DAC=011
1.075
1.2
1.325
V
V_{(2P0_VSRC)}
D+/D– voltage source (2.0 V)
I(DP) < 1 mA; DP_DAC=100
or
I(DM) < 1 m; DM_DAC=100
1.875
2.0
2.125
V
V_{(2P7_VSRC)}
D+/D– voltage source (2.7 V)
I(DP) < 1 mA; DP_DAC=101
or
I(DM) < 1 m; DM_DAC=101
2.575
2.7
2.825
V
V_{(3P3_VSRC)}
D+/D– voltage source (3.3 V)
I(DP) < 1 mA; DP_DAC=110
or
I(DM) < 1 m; DM_DAC=110
3.15
3.3
3.45
V
V_{(3p45_VSRC)}
I_{(10UA_ISRC)}
I_{(100UA_ISINK)}
I_{(DPDM_LKG)}
D+/D– voltage source (3.45 V)
D+ connection check current source
D+/D– current sink (100 µA)
D+/D– leakage current
D–, switch open
D+, switch open
3.3
3.45
7
10
50
100
–1
–1
3.6
V
14
µA
150
µA
1
µA
1
µA
I_{(1P6MA_ISINK)}
V_{(0P4_VTH)}
V_{(0P8_VTH)}
V_{(2P7_VTH)}
D+/D– current sink (1.6 mA)
D+/D– low comparator threshold
D+ low comparator threshold
D+/D– comparator threshold for non-standard adapter
detection (divider 1, 3, or 4)
1.45
1.60
1.75
µA
250
400
mV
0.8
V
2.55
2.85
V
V_{(2P0_VTH)}
D+/D– comparator threshold for non-standard adapter
detection (divider 1, 3)
1.85
2.15
V
V_{(1P2_VTH)}
D+/D– comparator threshold for non-standard adapter
detection (divider 2)
1.05
1.35
V
R_{(D–_DWN)}
D– pulldown for connection check
14.25
24.8
kΩ
10
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