BQ25890H Datasheet, PDF (28/66 Pages) Texas Instruments – I2C Controlled Single Cell 5-A Fast Charger

BQ25890H
SLUSCC5 – SEPTEMBER 2016
8.2.10 BATET (Q4) Control
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8.2.10.1 BATFET Disable Mode (Shipping Mode)
To extend battery life and minimize power when system is powered off during system idle, shipping, or storage,
the device can turn off BATFET so that the system voltage is zero to minimize the battery leakage current. When
the host set BATFET_DIS bit, the charger can turn off BATFET immediately or delay by t_{SM_DLY} as configurated
by BATFET_DLY bit.
8.2.10.2 BATFET Enable (Exit Shipping Mode)
When the BATFET is disabled (in shipping mode) and indicated by setting BATFET_DIS, one of the following
events can enable BATFET to restore system power:
1. Plug in adapter
2. Clear BATFET_DIS bit
3. Set REG_RST bit to reset all registers including BATFET_DIS bit to default (0)
4. A logic high to low transition on QON pin with t_SHIPMODE deglitch time to enable BATFET to exit shipping
mode
8.2.10.3 BATFET Full System Reset
The BATFET functions as a load switch between battery and system when input source is not plugged-in. By
changing the state of BATFET from off to on, system connects to SYS can be effectively have a power-on-reset.
The QON pin supports push-button interface to reset system power without host by change the state of BATFET.
When the QON pin is driven to logic low for t_{QON_RST} (typical 15 seconds) while input source is not plugged in
and BATFET is enabled (BATFET_DIS=0), the BATFET is turned off for t_{BATFET_RST} and then it is re-enabled to
reset system power. This function can be disabled by setting BATFET_RST_EN bit to 0.
8.2.11 Current Pulse Control Protocol
The device provides the control to generate the VBUS current pulse protocol to communicate with adjustable
high voltage adapter in order to signal adapter to increase or decrease output voltage. To enable the interface,
the EN_PUMPX bit must be set. Then the host can select the increase/decrease voltage pulse by setting one of
the PUMPX_UP or PUMPX_DN bit (but not both) to start the VBUS current pulse sequence. During the current
pulse sequence, the PUMPX_UP and PUMPX_DN bits are set to indicate pulse sequence is in progress and the
device pulses the input current limit between current limit set forth by IINLIM or IDPM_LIM register and the
100mA current limit (I_{INDPM100_ACC}). When the pulse sequence is completed, the input current limit is returned to
value set by IINLIM or IDPM_LIM register and the PUMPX_UP or PUMPX_DN bit is cleared. In addition, the
EN_PUMPX can be cleared during the current pulse sequence to terminate the sequence and force charger to
return to input current limit as set forth by the IINLIM or IDPM_LIM register immediately. When EN_PUMPX bit is
low, write to PUMPX_UP and PUMPX_DN bit would be ignored and have no effect on VBUS current limit.
8.2.12 D+/D- Output Driver
The device provides independent controlled voltage output drivers on D+ and D- pins to interface or emulate
non-standard adapters when input source is plugged-in or OTG mode is enabled. The D+/D- drivers are disabled
in high impedance mode (HiZ) by default or when DP_DAC or DM_DAC bits are set to 000. The drivers are
enabled and controlled independently with predefined voltage threshold when DP_DAC and DM_DAC bits are
set to values between 001 to 110.
When input source is plugged-in, the output drivers control (DP_DAC and DM_DAC) are reset to HiZ (000) to
execute USB BC1.2 and built-in handshake during the input source type detection. The host is recommended to
change DP_DAC and DM_DAC settings after input source type detection when VBUS_STAT/PG_STAT bits are
updated.
When OTG mode is enabled, the drivers can be enabled to provide electrical signature on D+/D- to emulate USB
non-standard adapters (Divider 1-4) as shown in Table 1.
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