BQ25890H Datasheet, PDF (27/66 Pages) Texas Instruments – I2C Controlled Single Cell 5-A Fast Charger

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PARAMETER
Battery Voltage (V_BAT)
System Voltage (V_SYS)
Temperature (TS) Voltage (V_TS)
VBUS Voltage (V_VBUS)
Charge Current (I_BAT)
BQ25890H
SLUSCC5 – SEPTEMBER 2016
Table 6. Battery Monitor Modes of Operation
REGISTER
REG0E
REG0F
REG10
REG11
REG12
CHARGE
MODE
Yes
Yes
Yes
Yes
Yes
MODES OF OPERATION
BOOST MODE
DISABLE CHARGE
MODE
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
NA
NA
BATTERY ONLY
MODE
Yes
Yes
Yes
NA
NA
8.2.9 Status/Control Outputs (STAT, INT and DSEL)
8.2.9.1 Charging Status Indicator (STAT)
The device indicates charging state on the open drain STAT pin. The STAT pin can drive LED as shown in
Figure 47. The STAT pin function can be disable by setting STAT_DIS bit.
Table 7. STAT Pin State
CHARGING STATE
Charging in progress (including recharge)
Charging complete
Sleep mode, charge disable
Charge suspend (Input overvoltage, TS fault, timer fault, input or system overvoltage).
Boost Mode suspend (due to TS Fault)
STAT INDICATOR
LOW
HIGH
HIGH
blinking at 1 Hz
8.2.9.2 Interrupt to Host (INT)
In some applications, the host does not always monitor the charger operation. The INT notifies the system on the
device operation. The following events will generate 256-µs INT pulse.
• USB/adapter source identified (through PSEL or DPDM detection, with OTG pin)
• Good input source detected
– VBUS above battery (not in sleep)
– VBUS below V_ACOV threshold
– VBUS above V_VBUSMIN (typical 3.8 V) when I_BADSRC (typical 30 mA) current is applied (not a poor source)
• Input removed
• Charge Complete
• Any FAULT event in REG0C
When a fault occurs, the charger device sends out INT and keeps the fault state in REG0C until the host reads
the fault register. Before the host reads REG0C and all the faults are cleared, the charger device would not send
any INT upon new faults. To read the current fault status, the host has to read REG0C two times consecutively.
The 1^st read reports the pre-existing fault register status and the 2^nd read reports the current fault register status.
8.2.9.3 D+/D- Multiplexer Selection Control
The DSEL pin is normally grounded and pulled-up by internally to 5V during input source type detection (when
AUTO_DPDM_EN=1 or FORCE_DPDM=1). The pin is normally low and drives high to indicate the D+/D-
detection is in progress. When detection is completed, the pin maintains high logic when DCP, MaxCharge or
HVDCP is detected. The pin returns to logic low when other input source type is detected. In addition, while input
source is plugged in or during OTG mode, the FORCE_DSEL bit can be set to force the DSEL pin to change
from low to high regardless of input source type detected. When in battery discharge mode (not in OTG), the
DSEL pin is always low.
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