DS90UB948-Q1_16 Datasheet, PDF (35/88 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

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DS90UB948-Q1
SNLS477A – OCTOBER 2014 – REVISED JANUARY 2016
result is held on the PASS pin. If the test ran error free, the PASS output will remain HIGH. If there one or
more errors were detected, the PASS output will output constant LOW. The PASS output state is held until a
new BIST is run, the device is RESET, or the device is powered down. BIST duration is user-controlled and
may be of any length.
The link returns to normal operation after the deserializer BISTEN pin is low. shows the waveform diagram of a
typical BIST test for two cases. Case 1 is error free, and Case 2 shows one with multiple errors. In most cases it
is difficult to generate errors due to the robustness of the link (differential data transmission etc.), thus they may
be introduced by greatly extending the cable length, faulting the interconnect medium, or reducing signal
condition enhancements (Rx Equalization).
Normal
Step 1: DES in BIST
BIST
Wait
Step 2: Wait, SER in BIST
BIST
start
Step 3: DES in Normal
Mode - check PASS
BIST
stop
Step 4: DES/SER in Normal
Figure 29. BIST Mode Flow Diagram
8.3.15.2 Forward Channel and Back Channel Error Checking
The Deserializer, on locking to the serial stream, compares the recovered serial stream with all-zeroes and
records any errors in status registers. Errors are also dynamically reported on the PASS pin of the deserializer.
Forward channel errors may also be read from register 0x25 (Table 11).
The back-channel data is checked for CRC errors once the serializer locks onto the back-channel serial stream,
as indicated by link detect status (register bit 0x0C[0] - Table 11). CRC errors are recorded in an 8-bit register in
the serializer. The register is cleared when the serializer enters the BIST mode. As soon as the serializer enters
BIST mode, the functional mode CRC register starts recording any back channel CRC errors. The BIST mode
CRC error register is active in BIST mode only and keeps the record of the last BIST run until cleared or the
serializer enters BIST mode again.
BISTEN
(DES)
CLK[2:1]
D[7:0]
7 bits/frame
DATA
(internal)
PASS
Prior Result
DATA
X
(internal)
PASS
Prior Result
Normal
SSO
X = bit error(s)
X
X
BIST Test
BIST Duration
BIST Waveforms
PASS
FAIL
BIST
Result
Held
Normal
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