DS90UB948-Q1_16 Datasheet, PDF (14/88 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

DS90UB948-Q1
SNLS477A – OCTOBER 2014 – REVISED JANUARY 2016
7.8 Timing Requirements for the Serial Control Bus
Over I²C supply and temperature ranges unless otherwise specified.
PARAMETER
TEST CONDITIONS
f_SCL
SCL Clock Frequency
Standard Mode
Fast Mode
Fast Plus Mode
t_LOW
SCL Low Period
Standard Mode
Fast Mode
Fast Plus Mode
t_HIGH
SCL High Period
Standard Mode
Fast Mode
Fast Plus Mode
t_HD;STA
Hold time for a start or a
repeated start condition
Figure 13
Standard Mode
Fast Mode
Fast Plus Mode
t_SU;STA
Set Up time for a start or a
repeated start condition
Figure 13
Standard Mode
Fast Mode
Fast Plus Mode
t_HD;DAT
Data Hold Time
Figure 13
Standard Mode
Fast Mode
Fast Plus Mode
t_SU;DAT
Data Set Up Time
Figure 13
Standard Mode
Fast Mode
Fast Plus Mode
t_SU;STO
Set Up Time for STOP
Condition
Figure 13
Standard Mode
Fast Mode
Fast Plus Mode
t_BUF
Bus Free Time
Standard Mode
Between STOP and START
Figure 13
Fast Mode
Fast Plus Mode
t_r
SCL & SDA Rise Time,
Standard Mode
Figure 13
Fast Mode
Fast Plus Mode
t_f
SCL & SDA Fall Time,
Standard Mode
Figure 13
Fast mode
Fast Plus Mode
C_b
Capacitive Load for Each Bus Standard Mode
Line
Fast Mode
Fast Plus Mode
t_SP
Input Filter
Fast Mode
Fast Plus Mode
(1) Parameter is specified by bench characterization and is not tested in production.
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MIN
>0
>0
>0
4.7
1.3
0.5
4.0
0.6
0.26
4.0
0.6
0.26
4.7
0.6
0.26
0
0
0
250
100
50
4.0
0.6
0.26
4.7
1.3
0.5
TYP
MAX
100
400
1
1000 ⁽¹⁾
300 ⁽¹⁾
120 ⁽¹⁾
300 ⁽¹⁾
300 ⁽¹⁾
120 ⁽¹⁾
400
400
550
50
50
UNIT
kHz
kHz
MHz
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
pF
pF
pF
ns
ns
14
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