DS90UB948-Q1_16 Datasheet, PDF (33/88 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

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DS90UB948-Q1
SNLS477A – OCTOBER 2014 – REVISED JANUARY 2016
2. I2C – Connect SCL and SDA signals. Both signals should be pulled up to VDD33 or VDDIO = 3.0 V to 3.6 V
with 4.7kΩ resistors.
3. Audio (optional) – Connect I2S_CLK, I2S_WC, and I2S_Dx signals. Audio is normally transported on the
FPD-Link interface.
4. IDx pin – Each Transmitter and Receiver must have an unique I2C address.
5. REPEAT & MODE_SEL pins — All Transmitters and Receivers must be set into Repeater Mode.
6. Interrupt pin – Connect DS90UB948-Q1 INTB_IN pin to the DS90UB947-Q1 INTB pin. The signal must be
pulled up to VDDIO with a 10kΩ resistor.
Deserializer
Serializer
D[7:0]+
D[7:0]-
CLK1+
CLK1-
VDD33
MODE_SEL
I2S_CLK
I2S_WC
I2S_Dx
VDD33
IDx
INTB_IN
Optional
VDDIO
VDD33
D[7:0]+
D[7:0]-
CLK+
CLK-
VDD33
I2S_CLK
I2S_WC
I2S_Dx
REPEAT
INTB
VDD33
IDx
SDA
SCL
SDA
SCL
Figure 27. Repeater Connection Diagram
8.3.14.2.1 Repeater Fan-out Electrical Requirements
Repeater applications requiring fan-out from one DS90UB948-Q1 Deserializer to up to three DS90UB947-Q1
Serializers requires special considerations for routing and termination of the FPD-Link differential traces.
Figure 28 details the requirements that must be met for each signal pair:
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