DS90UB948-Q1_16 Datasheet, PDF (25/88 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

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DS90UB948-Q1
SNLS477A – OCTOBER 2014 – REVISED JANUARY 2016
Table 5. GPIO_REG and GPIO Local Enable and Configuration (continued)
Description
GPIO_REG7
GPIO_REG6
GPIO_REG5
GPIO3
GPIO2
GPIO1
GPIO0
Register Configuration
0x21[3:0] = 0x1
0x21[3:0] = 0x9
0x21[3:0] = 0x3
0x20[7:4] = 0x1
0x20[7:4] = 0x9
0x20[7:4] = 0x3
0x20[3:0] = 0x1
0x20[3:0] = 0x9
0x20[3:0] = 0x3
0x1F[3:0] = 0x1
0x1F[3:0] = 0x9
0x1F[3:0] = 0x3
0x1E[7:4] = 0x1
0x1E[7:4] = 0x9
0x1E[7:4] = 0x3
0x1E[3:0] = 0x1
0x1E[3:0] = 0x9
0x1E[3:0] = 0x3
0x1D[3:0] = 0x1
0x1D[3:0] = 0x9
0x1D[3:0] = 0x3
Function
Output, L
Output, H
Input, Read: 0x6E[7]
Output, L
Output, H
Input, Read: 0x6E[6]
Output, L
Output, H
Input, Read: 0x6E[5]
Output, L
Output, H
Input, Read: 0x6E[3]
Output, L
Output, H
Input, Read: 0x6E[2]
Output, L
Output, H
Input, Read: 0x6E[1]
Output, L
Output, H
Input, Read: 0x6E[0]
8.3.10 SPI Communication
The SPI Control Channel utilizes the secondary link in a 2-lane FPD-Link III implementation. Two possible
modes are available, Forward Channel and Reverse Channel modes. In Forward Channel mode, the SPI Master
is located at the Serializer, such that the direction of sending SPI data is in the same direction as the video data.
In Reverse Channel mode, the SPI Master is located at the Deserializer, such that the direction of sending SPI
data is in the opposite direction as the video data.
The SPI Control Channel can operate in a high speed mode when writing data, but must operate at lower
frequencies when reading data. During SPI reads, data is clocked from the slave to the master on the SPI clock
falling edge. Thus, the SPI read must operate with a clock period that is greater than the round trip data latency.
On the other hand, for SPI writes, data can be sent at much higher frequencies where the MISO pin can be
ignored by the master.
SPI data rates are not symmetrical for the two modes of operation. Data over the forward channel can be sent
much faster than data over the reverse channel.
Note: SPI cannot be used to access Serializer / Deserializer registers.
8.3.10.1 SPI Mode Configuration
SPI is configured over I2C using the High-Speed Control Channel Configuration (HSCC_CONTROL) register,
0x43 (Table 11). HSCC_MODE (0x43[2:0]) must be configured for either High-Speed, Forward Channel SPI
mode (110) or High-Speed, Reverse Channel SPI mode (111).
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