DS90UB901Q Datasheet, PDF (34/45 Pages) Texas Instruments – 10 - 43MHz 14 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel

FIGURE 30. Synchronizing Multiple Cameras
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FIGURE 31. GPIO Delta Latency
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GENERAL PURPOSE I/O (GPIO)
The DS90UB901Q/902Q has up to 6 GPIO (2 dedicated and
4 programmable). GPIO[0] and GPIO[1] are always available
and GPIO[2:5] are available depending on the parallel data
bus size. DIN/ROUT[0:3] can be programmed into GPIOs
(GPIO[2:5]) when the parallel data bus is less than 12 bits
wide (10-bit data + HS,VS). Each GPIO can be configured as
either an input or output port. The GPIO maximum switching
rate is up to 66 kHz when configured for communication be-
tween Deserializer GPI to Serializer GPO. Whereas data flow
configured for communication between Serializer GPI to De-
serializer GPO is limited by the maximum data rate of the
PCLK.
AT-SPEED BIST (BISTEN, PASS)
An optional AT SPEED Built in Self Test (BIST) feature sup-
ports at speed testing of the high-speed serial and the bidi-
rectional control channel link. Control pins at the Deserializer
are used to enable the BIST test mode and allow the system
to initiate the test and set the duration. A HIGH on PASS pin
indicates that all payloads received during the test were error
free during the BIST duration test. A LOW on this pin at the
conclusion of the test indicates that one or more payloads
were detected with errors.
The BIST duration is defined by the width of BISTEN. BIST
starts when Deserializer LOCK goes HIGH and BISTEN is set
HIGH. BIST ends when BISTEN goes LOW. Any errors de-
tected after the BIST Duration are not included in PASS logic.
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