DS90UB901Q Datasheet, PDF (31/45 Pages) Texas Instruments – 10 - 43MHz 14 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel

DISPLAY MODE OPERATION
In Display mode, I²C transactions originate from the controller
attached to the Serializer. The I²C slave core in the Serializer
will detect if a transaction targets (local) registers within the
Serialier or the (remote) registers within the Deserializer or a
remote slave connected to the I²C master interface of the De-
serializer. Commands are sent over the forward channel link
to initiate the transactions. The Deserializer will receive the
command and generate an I²C transaction on its local I²C
bus. At the same time, the Deserializer will capture the re-
sponse on the I²C bus and return the response as a command
on the bidirectional control channel. The Serializer parses the
response and passes the appropriate response to the Serial-
izer I²C bus.
The physical device ID of the I²C slave in the Serializer is
determined by the analog voltage on the ID[x] input. It can be
reprogrammed by using the DEVICE_ID register and setting
the bit . The device ID of the logical I²C slave in the Deseri-
alizer is determined by programming the DES ID in the Seri-
alizer. The state of the ID[x] input on the Deserializer is used
to set the device ID. The I²C transactions between Ser/Des
will be bridged between the host controller to the remote
slave.
To configure the devices for display mode operation, set the
Serializer MODE pin to High and the Deserializer MODE pin
to Low. Before initiating any I²C commands, the Serializer
needs to be programmed with the target slave device address
and Serializer device address. DES_DEV_ID Register 0x06h
sets the Deserializer device address and SLAVE_DEV_ID
register 0x7h sets the remote target slave address. If the I²C
slave address matches any of registers values, the I²C slave
will hold the transaction allowing read or write to target device.
Note: In Display mode operation, registers 0x08h~0x17h on
Deserializer must be reset to 0x00.
CRC (CYCLIC REDUNDANCY CHECK) DETECTION
A 4-bit CRC per symbol is reserved for checking the link in-
tegrity during transmission. The reporting status pin (PASS)
is provided on the Deserializer side, which flags any mismatch
of data transmitted to and from the remote device. The
Deserializer's PLL must first be locked (LOCK pin HIGH) to
ensure the PASS status is valid. This error detection handling
generates an interrupt signal onto the PASS output pin; noti-
fying the host controller as soon as any errors are identified.
When an error occurs, the PASS asserts LOW. CRC registers
(CRC ERROR B0/B1) are also available for managing the
data error count.
The DS90UB901Q/902Q chipset provides several mecha-
nisms (operations) for ensuring data integrity in long distance
transmission and reception. The data error detection function
offers user flexibility and usability of performing bit-by-bit and
data transmission error checking. The error detection oper-
ating modes support data validation of the following signals:
• Bidirectional Channel Control
• Control VSYNC and HSYNC signals across serial link
• Parallel video/pixel data across serial link
PROGRAMMABLE CONTROLLER
An integrated I²C slave controller is embedded in each of the
DS90UB901Q Serializer and DS90UB902Q Deserializer. It
must be used to access and program the extra features em-
bedded within the configuration registers. Refer to Table 1
and Table 2 for details of control registers.
MULTIPLE DEVICE ADDRESSING
Some applications require multiple camera devices with the
same fixed address to be accessed on the same I²C bus. The
DS90UB901/902 provides slave ID matching/aliasing to gen-
erate different target slave addresses when connecting more
than two identical devices together on the same bus. This al-
lows the slave devices to be independently addressed. Each
device connected to the bus is addressable through a unique
ID by programming of the SLAVE_ID_MATCH register on
Deserializer. This will remap the SLAVE_ID_MATCH address
to the target SLAVE_ID_INDEX address; up to 8 ID indexes
are supported. The ECU Controller must keep track of the list
of I²C peripherals in order to properly address the target de-
vice. In a camera application, the microcontroller is located
on the Deserializer side. In this case, the microcontroller pro-
grams the slave address matching registers and handles all
data transfers to and from all slave I²C devices. This is useful
in the event where camera modules are removed or replaced.
For example in the configuration shown in Figure 28:
• ECU is the I²C master and has an I²C master interface
• The I²C interfaces in DES A and DES B are both slave
interfaces
• The I²C protocol is bridged from DES A to SER A and from
DES B to SER B
• The I²C interfaces in SER A and SER B are both master
interfaces
If master controller transmits I²C slave 0xA0, the DES A ad-
dress 0xC0 will forward the transaction to remote Camera A.
If the controller transmits slave address 0xA4, the DES B
0xC2 will recognize that 0xA4 is mapped to 0xA0 and will be
transmitted to the remote Camera B. If controller sends com-
mand to address 0xA6, the DES B 0xC2 will forward trans-
action to slave device 0xA2.
The Slave ID index/match is supported only in the camera
mode (SER: MODE pin = L; DES: MODE pin = H). For Multiple
device addressing in display mode (SER: MODE pin = H;
DES: MODE pin = L), use the I²C pass through function.
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