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DS125BR800 Datasheet, PDF (34/59 Pages) Texas Instruments – Low-Power 12.5-Gbps 8-Channel Repeater With Input Equalization and Output De-Emphasis
DS125BR800
SNLS426E – AUGUST 2012 – REVISED JANUARY 2015
Register Maps (continued)
Address Register Name
Bit
0x26
CH3 - CHB3
7
DEM
6:5
4:3
2:0
0x27
CH3 - CHB3
7:4
IDLE Threshold
3:2
1:0
0x28
Signal Detect Control
7:6
5:4
3:2
1:0
0x29
Reserved
7:0
34
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Table 10. SMBUS Slave Mode Register Map (continued)
Field
RXDET STATUS
Type
R
Default
0x02
MODE_DET STATUS R
Reserved
R/W
DEM Control
R/W
Reserved
IDLE tha
R/W 0x00
IDLE thd
Reserved
High IDLE
R/W 0x0C
Fast IDLE
Reduced SD Gain
Reserved
R/W 0x00
EEPROM Bit
Yes
Yes
Yes
Yes
Yes
Yes
Description
Observation bit for RXDET CH3 - CHB3.
1: RX = detected
0: RX = not detected
Observation bit for MODE_DET CH3 - CHB3.
00: PCIe Gen-1 (2.5G)
01: PCIe Gen-2 (5G)
11: PCIe Gen-3 (8G+)
Note: Only functions when MODE Pin = Automatic
Set bits to 0.
OB3 DEM Control
000: 0 dB
001: –1.5 dB
010: –3.5 dB (default)
011: –5 dB
100: –6 dB
101: –8 dB
110: –9 dB
111: –12 dB
Set bits to 0.
Assert threshold
00 = 180 mVp-p (default)
01 = 160 mVp-p
10 = 210 mVp-p
11 = 190 mVp-p
Note: override the SD_TH pin.
De-Assert threshold
00 = 110 mVp-p (default)
01 = 100 mVp-p
10 = 150 mVp-p
11 = 130 mVp-p
Note: override the SD_TH pin.
Set bits to 0.
Enable higher range of Signal Detect Thresholds
[5]: CH0 - CH3
[4]: CH4 -CH7
Enable Fast OOB response
[3]: CH0 - CH3
[2]: CH4 -CH7
Enable reduced Signal Detect Gain
[1]: CH0 - CH3
[0]: CH4 -CH7
Set bits to 0
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