DS125BR800 Datasheet, PDF (19/59 Pages) Texas Instruments – Low-Power 12.5-Gbps 8-Channel Repeater With Input Equalization and Output De-Emphasis

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EEPROM Address Byte
Description
0x16
SMBus Register
Default Value 80
Description
SMBus Register
Default Value 5F
0x17
Description
SMBus Register
Default Value 5A
0x18
Description
SMBus Register
Default Value 80
0x19
Description
SMBus Register
Default Value 05
0x1A
Description
SMBus Register
Default Value F5
0x1B
Description
SMBus Register
Default Value A8
0x1C
Description
SMBus Register
Default Value 00
0x1D
Description
SMBus Register
Default Value 5F
0x1E
Description
SMBus Register
Default Value 5A
0x1F
Description
SMBus Register
Default Value 80
0x20
DS125BR800
SNLS426E – AUGUST 2012 – REVISED JANUARY 2015
Table 7. EEPROM Register Map - Single Device with Default Value (continued)
Bit 7
en_fast_idle_s
0x28 [2]
1
Bit 6
eqsd_mgain_n
0x28 [1]
0
Bit 5
eqsd_mgain_s
0x28 [0]
0
Bit 4
ch4_Idle_auto
0x2B [5]
0
Bit 3
ch4_Idle_sel
0x2B [4]
0
Bit 2
ch4_RXDET_1
0x2B [3]
0
ch4_BST_6
0x2C [6]
0
ch4_BST_5
0x2C [5]
1
ch4_BST_4
0x2C [4]
0
ch4_BST_3
0x2C [3]
1
ch4_BST_2
0x2C [2]
1
ch4_BST_1
0x2C [1]
1
ch4_Sel_mode
0x2D [6]
0
ch4_RES_2
0x2D [5]
1
ch4_RES_1
0x2D [4]
0
ch4_RES_0
0x2D [3]
1
ch4_VOD_2
0x2D [2]
1
ch4_VOD_1
0x2D [1]
0
ch4_DEM_1
0x2E [1]
1
ch4_DEM_0
0x2E [0]
0
ch4_Slow
0x2F [7]
0
ch4_idle_tha_1
0x2F [3]
0
ch4_idle_tha_0
0x2F [2]
0
ch4_idle_thd_1
0x2F [1]
0
ch5_Idle_sel
0x32 [4]
0
ch5_RXDET_1
0x32 [3]
0
ch5_RXDET_0
0x32 [2]
0
ch5_BST_7
0x33 [7]
0
ch5_BST_6
0x33 [6]
0
ch5_BST_5
0x33 [5]
1
ch5_BST_2
0x33 [2]
1
ch5_BST_1
0x33 [1]
1
ch5_BST_0
0x33 [0]
1
ch5_Sel_scp
0x34 [7]
1
ch5_Sel_mode
0x34 [6]
0
ch5_RES_2
0x34 [5]
1
ch5_VOD_2
0x34 [2]
1
ch5_VOD_1
0x34 [1]
0
ch5_VOD_0
0x34 [0]
1
ch5_DEM_2
0x35 [2]
0
ch5_DEM_1
0x35 [1]
1
ch5_DEM_0
0x35 [0]
0
ch5_idle_tha_0
0x36 [2]
0
ch5_idle_thd_1
0x36 [1]
0
ch5_idle_thd_0
0x36 [0]
0
ch6_Idle_auto
0x39 [5]
0
ch6_Idle_sel
0x39 [4]
0
ch6_RXDET_1
0x39 [3]
0
ch6_BST_6
0x3A [6]
0
ch6_BST_5
0x3A [5]
1
ch6_BST_4
0x3A [4]
0
ch6_BST_3
0x3A [3]
1
ch6_BST_2
0x3A [2]
1
ch6_BST_1
0x3A [1]
1
ch6_Sel_mode
0x3B [6]
0
ch6_RES_2
0x3B [5]
1
ch6_RES_1
0x3B [4]
0
ch6_RES_0
0x3B [3]
1
ch6_VOD_2
0x3B [2]
1
ch6_VOD_1
0x3B [1]
0
ch6_DEM_1
0x3C [1]
1
ch6_DEM_0
0x3C [0]
0
ch6_Slow
0x3D [7]
0
ch6_idle_tha_1
0x3D [3]
0
ch6_idle_tha_0
0x3D [2]
0
ch6_idle_thd_1
0x3D [1]
0
Bit 1
ch4_RXDET_0
0x2B [2]
0
ch4_BST_0
0x2C [0]
1
ch4_VOD_0
0x2D [0]
1
ch4_idle_thd_0
0x2F [0]
0
ch5_BST_4
0x33 [4]
0
ch5_RES_1
0x34 [4]
0
ch5_Slow
0x36 [7]
0
ch6_RXDET_0
0x39 [2]
0
ch6_BST_0
0x3A [0]
1
ch6_VOD_0
0x3B [0]
1
ch6_idle_thd_0
0x3D [0]
0
BIt 0
ch4_BST_7
0x2C [7]
0
ch4_Sel_scp
0x2D [7]
1
ch4_DEM_2
0x2E [2]
0
ch5_Idle_auto
0x32 [5]
0
ch5_BST_3
0x33 [3]
1
ch5_RES_0
0x34 [3]
1
ch5_idle_tha_1
0x36 [3]
0
ch6_BST_7
0x3A [7]
0
ch6_Sel_scp
0x3B [7]
1
ch6_DEM_2
0x3C [2]
0
ch7_Idle_auto
0x40 [5]
0
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